Commits · 3041443b5c6a9c6bdd2ad7eb9da908b626e76a22 · Lorenzo Albano / LLVM bpEVL · GitLab

Sep 30, 2014
- Add numeric extend, trunctate to mips fast-isel · 3ebdcc9e
  Reed Kotler authored Sep 30, 2014
  3ebdcc9e
- [AArch64] Remove unnecessary whitespace. (Test commit) · 2c13e717
  Tom Coxon authored Sep 30, 2014
  2c13e717
- [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VCMPGT{BWDQ}. · 28a7df0b
  Robert Khasanov authored Sep 30, 2014
  28a7df0b
- [AVX512] Added intrinsics for 128- and 256-bit versions of VCMPEQ{BWDQ} · 5aa4445b
  Robert Khasanov authored Sep 30, 2014
  5aa4445b
- [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW. · b25e562d
  Robert Khasanov authored Sep 30, 2014
  b25e562d
- [AVX512] Enabled intrinsics for VPCMPEQD and VPCMPEQQ. · a27c8e0f
  Robert Khasanov authored Sep 30, 2014
  a27c8e0f
- Make sure aggregates are properly alligned on MSP430. · a9372a27
  Job Noorman authored Sep 30, 2014
  a9372a27
- [x86] Revert r218588, r218589, and r218600. These patches were pursuing · aaf8e03d
  Chandler Carruth authored Sep 30, 2014
  aaf8e03d
- Fix missing C++ mode comment · 06a711dc
  Matt Arsenault authored Sep 30, 2014
  06a711dc
- [FastISel][AArch64] Fold sign-/zero-extends into the load instruction. · 6ac12439
  Juergen Ributzka authored Sep 30, 2014
  6ac12439
- [FastISel][AArch64] Factor out scale factor calculation. NFC. · 0616d9d4
  Juergen Ributzka authored Sep 30, 2014
  0616d9d4
- Simplify conditional. · a2db922c
  Eric Christopher authored Sep 29, 2014
  a2db922c
- [AVX512] Use X86VectorVTInfo in the masking helper classes and the FMAs · 6bddb8c3
  Adam Nemet authored Sep 29, 2014
  6bddb8c3
Sep 29, 2014
- Add soft-float to the key for the subtarget lookup in the TargetMachine · 6a0551e4
  Eric Christopher authored Sep 29, 2014
  6a0551e4
- Fix spelling and reflow comments. · 9b270d4d
  Eric Christopher authored Sep 29, 2014
  9b270d4d
- [AArch64] Refines the Cortex-A57 Machine Model · 5f9daea1
  Dave Estes authored Sep 29, 2014
  5f9daea1
- Fix include order · 1fd0c628
  Matt Arsenault authored Sep 29, 2014
  1fd0c628
- R600/SI: Fix hardcoded values for modifiers. · 9783e00d
  Matt Arsenault authored Sep 29, 2014
  9783e00d
- R600/SI: Also fix fsub + fadd a, a to mad combines · 3d4233fe
  Matt Arsenault authored Sep 29, 2014
  3d4233fe
- R600/SI: Fix using mad with multiplies by 2 · 02cb0ff7
  Matt Arsenault authored Sep 29, 2014
  02cb0ff7
- [AArch64] Improve cost model to handle sdiv by a pow-of-two. · 70d54ac8
  Chad Rosier authored Sep 29, 2014
  70d54ac8
- [Thumb2] ldrexd and strexd are not defined on v7M · a4eba5ad
  Oliver Stannard authored Sep 29, 2014
  a4eba5ad
- [x86] Make the new vector shuffle lowering lower blends as VSELECT · 6cbf4316
  Chandler Carruth authored Sep 29, 2014
  6cbf4316
- [x86] Delete a bunch of really bad and totally unnecessary code in the · b1cc7a85
  Chandler Carruth authored Sep 29, 2014
  b1cc7a85
- [x86] Refactor all of the VSELECT-as-blend lowering code to avoid domain · d639c7a8
  Chandler Carruth authored Sep 29, 2014
  d639c7a8
- [x86] Improve naming and comments for VSELECT lowering. · 2f9e56e5
  Chandler Carruth authored Sep 29, 2014
  2f9e56e5
- [x86] Add the dispatch skeleton to the new vector shuffle lowering for · c7129276
  Chandler Carruth authored Sep 29, 2014
  c7129276
- [x86] Make the split-and-lower routine fully generic by relaxing the · 32a3ebda
  Chandler Carruth authored Sep 29, 2014
  32a3ebda
- [x86] Teach the new vector shuffle lowering to fall back on AVX-512 · 24e3b69c
  Chandler Carruth authored Sep 28, 2014
  24e3b69c
- [x86] Fix the new vector shuffle lowering's use of VSELECT for AVX2 · abe742e8
  Chandler Carruth authored Sep 28, 2014
  abe742e8
Sep 28, 2014
- [x86] Fix a really silly bug that I introduced fixing another bug in the · 6578f920
  Chandler Carruth authored Sep 28, 2014
  6578f920
- [x86] Fix yet another bug in the new vector shuffle lowering's handling · b10c6b8e
  Chandler Carruth authored Sep 28, 2014
  b10c6b8e
Sep 27, 2014
- [x86] Fix yet another issue with widening vector shuffle elements. · f4b9e6b9
  Chandler Carruth authored Sep 27, 2014
  f4b9e6b9
- [x86] Fix terrible bugs everywhere in the new vector shuffle lowering · 4d03be17
  Chandler Carruth authored Sep 27, 2014
  4d03be17
- [x86] Flip the sentinel values used in the target shuffle mask decoding · 81e6b29f
  Chandler Carruth authored Sep 27, 2014
  81e6b29f
- Refactor reciprocal and reciprocal square root estimate into target-independent functions (part 2). · bdf1e388
  Sanjay Patel authored Sep 26, 2014
  bdf1e388
Sep 26, 2014
- [x86] Fix a moderately terrifying bug in the new 128-bit shuffle logic · f572f3b2
  Chandler Carruth authored Sep 26, 2014
  f572f3b2
- R600/SI: Use break instead of continue · 2dd3129b
  Matt Arsenault authored Sep 26, 2014
  2dd3129b
- R600/SI: Add a note about the order of the operands to div_scale · a276c3e0
  Matt Arsenault authored Sep 26, 2014
  a276c3e0
- R600/SI: Move finding SGPR operand to move to separate function · ee522bf2
  Matt Arsenault authored Sep 26, 2014
  ee522bf2