Commits · 339380286b77269a5a293e4ce7b837850b310ac1 · Lorenzo Albano / LLVM bpEVL · GitLab

May 02, 2012
- Remove trailing spaces. · 33938028
  Jakub Staszak authored May 01, 2012
  33938028
May 01, 2012
- · 5ae5278c
  Preston Gurd authored May 01, 2012
  5ae5278c
- X86: optimization for max-like struct · 425a55c1
  Manman Ren authored May 01, 2012
  425a55c1
- X86: Use StackRegister instead of FrameRegister in getFrameIndexReference (to... · c4b3ad81
  Alexey Samsonov authored May 01, 2012
  c4b3ad81
- Change the PassManager from a reference to a pointer. · b12f16e7
  Bill Wendling authored May 01, 2012
  b12f16e7
- Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors. · 05eb6e09
  Craig Topper authored May 01, 2012
  05eb6e09
- Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify Bulldozer feature list. · bae0e9ea
  Craig Topper authored May 01, 2012
  bae0e9ea
- Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711. · d32ebcc3
  Craig Topper authored May 01, 2012
  d32ebcc3
- Make XOP imply AVX as its needed to legalize the registers types. · 43518cc5
  Craig Topper authored May 01, 2012
  43518cc5
- Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES... · c0cef32b
  Craig Topper authored May 01, 2012
  c0cef32b
- Make CLMUL and AES imply SSE2 since its needed to legalize the type. · 29dd148a
  Craig Topper authored May 01, 2012
  29dd148a
- Enable AVX and FMA4 for AMD Bulldozer processors. · 0eacda5f
  Craig Topper authored May 01, 2012
  0eacda5f
- X86: optimization for -(x != 0) · 4f4d5c8f
  Manman Ren authored Apr 30, 2012
  4f4d5c8f
Apr 30, 2012
- Tidy up. No functional change intended. · d427d51c
  Chad Rosier authored Apr 30, 2012
  d427d51c
- Fix fastcc structure return with fast-isel on x86-32 · b051adf2
  Derek Schuff authored Apr 30, 2012
  b051adf2
- No need to normalize index before calling Extract128BitVector · 55b39908
  Craig Topper authored Apr 30, 2012
  55b39908
- Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT... · f76b5fe5
  Pete Cooper authored Apr 30, 2012
  f76b5fe5
Apr 29, 2012
- Remove unneeded casts. No functionality change. · da03f3ba
  Jakub Staszak authored Apr 29, 2012
  da03f3ba
- Simplify code a bit. No functional change intended. · 3b94fa63
  Craig Topper authored Apr 29, 2012
  3b94fa63
Apr 28, 2012
- Revert r155745 · a99b1681
  Derek Schuff authored Apr 27, 2012
  a99b1681
- Fix fastcc structure return with fast-isel on x86-32 · bbf8b83e
  Derek Schuff authored Apr 27, 2012
  bbf8b83e
- Use 'unsigned' instead of 'int' in several places when retrieving number of vector elements. · 0fa6c7e5
  Craig Topper authored Apr 27, 2012
  0fa6c7e5
- Add x86-specific DAG combine to simplify: · 32c2178e
  Chad Rosier authored Apr 27, 2012
  32c2178e
Apr 27, 2012
- Tidy up spacing. · 42cd8d2c
  Craig Topper authored Apr 27, 2012
  42cd8d2c
- X86: Don't emit conditional floating point moves on when targeting pre-pentiumpro architectures. · 913da4b2
  Benjamin Kramer authored Apr 27, 2012
  913da4b2
Apr 26, 2012
- · 81290f4b
  Preston Gurd authored Apr 26, 2012
  81290f4b
- Enable detection of AVX and AVX2 support through CPUID. Add AVX/AVX2 to... · 08ccfbe5
  Craig Topper authored Apr 26, 2012
  08ccfbe5
Apr 25, 2012
- Use vector_shuffles instead of target specific unpack nodes for AVX... · 5ff6dc34
  Craig Topper authored Apr 25, 2012
  5ff6dc34
Apr 24, 2012
- AVX: Add additional vbroadcast replacement sequences for integers. · 810734b7
  Nadav Rotem authored Apr 24, 2012
  810734b7
- AVX2: The BLENDPW instruction selects between vectors of v16i16 using an i8 · 7b7b99c7
  Nadav Rotem authored Apr 24, 2012
  7b7b99c7
- AVX: We lower VECTOR_SHUFFLE and BUILD_VECTOR nodes into vbroadcast instructions · aa3ff8da
  Nadav Rotem authored Apr 24, 2012
  aa3ff8da
- Remove dangling spaces. Fix some other formatting. · 0b65c408
  Craig Topper authored Apr 24, 2012
  0b65c408
- Simplify code a bit and make it compile better. Remove unused parameters. · 6f2a535d
  Craig Topper authored Apr 24, 2012
  6f2a535d
Apr 23, 2012
- Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the... · 3f8acfc3
  Nadav Rotem authored Apr 23, 2012
  3f8acfc3
- This patch fixes a problem which arose when using the Post-RA scheduler · 9a091475
  Preston Gurd authored Apr 23, 2012
  9a091475
- Use MVT instead of EVT through all of LowerVECTOR_SHUFFLEtoBlend and not just... · 153bb34a
  Craig Topper authored Apr 23, 2012
  153bb34a
- Make getZeroVector and getOnesVector more alike as far as how they detect... · 0a2c809d
  Craig Topper authored Apr 23, 2012
  0a2c809d
- Tidy up by removing some 'else' after 'return' · 2bbe8bcf
  Craig Topper authored Apr 23, 2012
  2bbe8bcf
- Tidy up spacing in LowerVECTOR_SHUFFLEtoBlend. Remove code that checks if... · 5c51eeec
  Craig Topper authored Apr 23, 2012
  5c51eeec
- Add a couple llvm_unreachables. · a52f0d09
  Craig Topper authored Apr 23, 2012
  a52f0d09