Commits · 411842f98f392c2974db6d8921dd1d6c48d95b5f · Lorenzo Albano / LLVM bpEVL

Oct 04, 2011
- whitespace · 411842f9
  Andrew Trick authored Oct 04, 2011
```
llvm-svn: 141058
```
  411842f9
- Remove last references to hotpatch. · 74e5a2a7
  Rafael Espindola authored Oct 04, 2011
```
llvm-svn: 141057
```
  74e5a2a7
- Exclude libLLVMTableGen.a from the shared library · b3334f9f
  Peter Collingbourne authored Oct 04, 2011
```
Unbreaks tools for --enable-shared build.

llvm-svn: 141052
```
  b3334f9f
- Generic cleanup. · ac3fb4c0
  Bill Wendling authored Oct 04, 2011
```
llvm-svn: 141050
```
  ac3fb4c0
- Unit test for r140919, loop unroll heuristics. · bf51f97c
  Andrew Trick authored Oct 04, 2011
```
llvm-svn: 141049
```
  bf51f97c
- Tidy up. These tests are covered in the .s file tests now. · b85400aa
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141047
```
  b85400aa
- ARM assembly parsing and encoding for VMOV immediate. · e7fbce7a
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141046
```
  e7fbce7a
- Tidy up. 80 columns. · 69e6f90e
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141043
```
  69e6f90e
- Use the PC label ID rather than '1'. Add support for thumb-2, because I heard... · 1eab54f8
  Bill Wendling authored Oct 03, 2011
```
Use the PC label ID rather than '1'. Add support for thumb-2, because I heard that some people use it.

llvm-svn: 141042
```
  1eab54f8
- Don't carry over the dispatchsetup hack from the old system. · 97a8695f
  Bill Wendling authored Oct 03, 2011
```
llvm-svn: 141040
```
  97a8695f
- ARM parsing/encoding for VCMP/VCMPE. · 46b66460
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141038
```
  46b66460
Oct 03, 2011
- Fix typo in comments. · f66daac2
  Nick Lewycky authored Oct 03, 2011
```
llvm-svn: 141032
```
  f66daac2
- Check-pointing the new SjLj EH lowering. · 374ee194
  Bill Wendling authored Oct 03, 2011
```
This code will replace the version in ARMAsmPrinter.cpp. It creates a new
machine basic block, which is the dispatch for the return from a longjmp
call. It then shoves the address of that machine basic block into the correct
place in the function context so that the EH runtime will jump to it directly
instead of having to go through a compare-and-jump-to-the-dispatch bit. This
should be more efficient in the common case.

llvm-svn: 141031
```
  374ee194
- Move CHECK after entry label. · 6c71ef32
  Akira Hatanaka authored Oct 03, 2011
```
llvm-svn: 141030
```
  6c71ef32
- Add support for 64-bit logical NOR. · c3a6357e
  Akira Hatanaka authored Oct 03, 2011
```
llvm-svn: 141029
```
  c3a6357e
- Add support for 64-bit count leading ones and zeros instructions. · 48a72ca0
  Akira Hatanaka authored Oct 03, 2011
```
llvm-svn: 141028
```
  48a72ca0
- Move the grabbing of the jump buffer into the caller function, eliminating the... · 6f3e73d6
  Bill Wendling authored Oct 03, 2011
```
Move the grabbing of the jump buffer into the caller function, eliminating the need for returning a std::pair.

llvm-svn: 141026
```
  6f3e73d6
- ARM assembly parsing and encoding for VMRS/FMSTAT. · 4ab23b52
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141025
```
  4ab23b52
- Add support for 64-bit divide instructions. · b1538f91
  Akira Hatanaka authored Oct 03, 2011
```
llvm-svn: 141024
```
  b1538f91
- Add C api for Instruction->eraseFromParent(). · dbebc6f3
  Devang Patel authored Oct 03, 2011
```
llvm-svn: 141023
```
  dbebc6f3
- Update test for 141010. · c3fc62b4
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141022
```
  c3fc62b4
- Thumb2 ADD/SUB can take SP as a destination register. · 5dd3425b
  Jim Grosbach authored Oct 03, 2011
```
It's documented as a separate instruction to line up with the Thumb1
encodings, for which it really is a distinct instruction encoding.

llvm-svn: 141020
```
  5dd3425b
- Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integer · 3caf8cb3
  Akira Hatanaka authored Oct 03, 2011
```
registers.

llvm-svn: 141019
```
  3caf8cb3
- Add support for 64-bit integer multiply instructions. · a279d9bd
  Akira Hatanaka authored Oct 03, 2011
```
llvm-svn: 141017
```
  a279d9bd
- Add definitions of instructions which move values between 64-bit integer · cdcc7456
  Akira Hatanaka authored Oct 03, 2011
```
registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions
of the instructions.

llvm-svn: 141015
```
  cdcc7456
- Find the strip tool that works with the specified SDKROOT. rdar://10165908 · 7f6f1240
  Bob Wilson authored Oct 03, 2011
```
llvm-svn: 141013
```
  7f6f1240
- Tidy up a bit. Formatting. · b817655b
  Jim Grosbach authored Oct 03, 2011
```
llvm-svn: 141010
```
  b817655b
- Add support for MOVBE and RDRAND instructions for the assembler and... · 786bdb9e
  Craig Topper authored Oct 03, 2011
```
Add support for MOVBE and RDRAND instructions for the assembler and disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027.

llvm-svn: 141007
```
  786bdb9e
- Whitespace. · cead033c
  Eric Christopher authored Oct 03, 2011
```
llvm-svn: 141005
```
  cead033c
- Typo. · f84354bf
  Eric Christopher authored Oct 03, 2011
```
llvm-svn: 141004
```
  f84354bf
- Add the returns_twice attribute to LLVM. · cc349c8d
  Rafael Espindola authored Oct 03, 2011
```
llvm-svn: 141001
```
  cc349c8d
- Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to... · 0d0be47d
  Craig Topper authored Oct 03, 2011
```
Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to registers xmm8-xmm15 outside 64-bit mode.

llvm-svn: 140997
```
  0d0be47d
- Test updates that were supposed to go with r140993. · 285bc340
  Craig Topper authored Oct 03, 2011
```
llvm-svn: 140994
```
  285bc340
- Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode. · 31854ba0
  Craig Topper authored Oct 03, 2011
```
llvm-svn: 140993
```
  31854ba0
- Reapply r140979 with fix! We never did get a testcase, but careful review of the · 31555524
  Nick Lewycky authored Oct 03, 2011
```
logic by David Meyer revealed this bug.

llvm-svn: 140992
```
  31555524
- attempt to fix ocaml bindings: landing pads · 0038e063
  Torok Edwin authored Oct 03, 2011
```
llvm-svn: 140991
```
  0038e063
- Revert r140979 due to reports of bootstrap failure. · b1dbce14
  Nick Lewycky authored Oct 03, 2011
```
llvm-svn: 140980
```
  b1dbce14
- Add one more case we compute a max trip count. · 3c624b8d
  Nick Lewycky authored Oct 03, 2011
```
llvm-svn: 140979
```
  3c624b8d
Oct 02, 2011

Fix some Intel syntax disassembly issues with instructions that implicitly use... · 7aea69d9

Craig Topper authored Oct 02, 2011

Fix some Intel syntax disassembly issues with instructions that implicitly use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST.

llvm-svn: 140974

7aea69d9

Special case disassembler handling of REX.B prefix on NOP instruction to... · 21c33657

Craig Topper authored Oct 02, 2011

Special case disassembler handling of REX.B prefix on NOP instruction to decode as XCHG R8D, EAX instead. Fixes PR10344.

llvm-svn: 140971

21c33657