Commits · 4e838ba9ea2cc7effbb051fdacf74a738b35eb6a · Lorenzo Albano / LLVM bpEVL · GitLab

Jan 04, 2021
- [NewPM][AMDGPU] Port amdgpu-always-inline · 4e838ba9
  Arthur Eubanks authored Jan 02, 2021
  4e838ba9
- [NewPM][AMDGPU] Port amdgpu-printf-runtime-binding · fd323a89
  Arthur Eubanks authored Jan 02, 2021
  fd323a89
- [RISCV] Remove unused method RISCVInstPrinter::printSImm5Plus1. NFC · fe597efc
  Craig Topper authored Jan 04, 2021
  fe597efc
- [NewPM][AMDGPU] Port amdgpu-unify-metadata · e1833e74
  Arthur Eubanks authored Jan 02, 2021
  e1833e74
- [NewPM][AMDGPU] Port amdgpu-propagate-attributes-early/late · a5f863e0
  Arthur Eubanks authored Dec 29, 2020
  a5f863e0
- [llvm] Use llvm::any_of (NFC) · eb198f4c
  Kazu Hirata authored Jan 04, 2021
  
  eb198f4c
- [NewPM][AMDGPU] Run InternalizePass when -amdgpu-internalize-symbols · b8f22f9d
  Arthur Eubanks authored Dec 28, 2020
  b8f22f9d
- [RISCV] Replace i32 with XLenVT in (add AddrFI, simm12) isel patterns. · dc9ac0e8
  Craig Topper authored Jan 04, 2021
  dc9ac0e8
- CodeGen: Use Register · d8938c8b
  Matt Arsenault authored Dec 22, 2020
  
  d8938c8b
- [Hexagon] Fix bad SDNodeXForm · c55b609b
  Krzysztof Parzyszek authored Jan 04, 2021
  c55b609b
- [Sparc] SparcMCExpr::printVariantKind - fix Wcovered-switch-default gcc warning. NFCI. · 4d7cb6da
  Simon Pilgrim authored Jan 04, 2021
  
  4d7cb6da
- [AArch64][SVE]Add cost model for masked gather and scatter for scalable vector. · 060cfd97
  Caroline Concatto authored Dec 17, 2020
  060cfd97
- [AArch64] Add patterns for FMCLA*_indexed. · d38a0258
  Florian Hahn authored Jan 04, 2021
  d38a0258
- [ARM] Extend lowering for i64 reductions · 901cc9b6
  David Green authored Jan 04, 2021
  901cc9b6
- [Sparc] Fixes for the internal assembler · 42652c1d
  LemonBoy authored Jan 04, 2021
  42652c1d
- [VE] Change default CPU name to "generic" · c287f90c
  Kazushi (Jam) Marukawa authored Dec 27, 2020
  c287f90c
- [AARCH64] Improve accumulator forwarding for Cortex-A57 model · 685c8b53
  Usman Nadeem authored Jan 04, 2021
  685c8b53
- [VE] Remove VA.needsCustom checks · 74e7cb26
  Kazushi (Jam) Marukawa authored Dec 28, 2020
  74e7cb26
- [SVE] Fix inline assembly parsing crash · a6509204
  David Sherwood authored Dec 18, 2020
  a6509204
- [RISCV] Remove unused method isUImm5NonZero() from RISCVAsmParser.cpp. NFC · 94257d12
  Craig Topper authored Jan 04, 2021
  94257d12
- [PowerPC] Do not fold `cmp(d|w)` and `subf` instruction to `subf.` if `nsw` is not present · f6515b05
  Kai Luo authored Dec 29, 2020
  f6515b05
Jan 03, 2021
- [Target] Construct SmallVector with iterator ranges (NFC) · 0e219b64
  Kazu Hirata authored Jan 03, 2021
  
  0e219b64
- [Target] Use llvm::append_range (NFC) · 985f899b
  Kazu Hirata authored Jan 03, 2021
  
  985f899b
- [X86] Make deinterleave8bitStride3 use unary CreateShuffleVector · 49c2d703
  Juneyoung Lee authored Jan 04, 2021
  49c2d703
Jan 02, 2021
- [SimplifyCFG][AMDGPU] AMDGPUUnifyDivergentExitNodes: SimplifyCFG isn't ready... · 7c8b8063
  Roman Lebedev authored Jan 02, 2021
  7c8b8063
- [PowerPC] Add the LLVM triple for powerpcle [1/5] · 8f004471
  Brandon Bergren authored Jan 02, 2021
  8f004471
- [llvm] Use llvm::erase_value and llvm::erase_if (NFC) · 171c5fd4
  Kazu Hirata authored Jan 02, 2021
  
  171c5fd4
- [NFC][RISCV] Move vmsge{u}.vx processing to RISCVAsmParser. · e4337159
  Hsiangkai Wang authored Jan 02, 2021
  e4337159
Jan 01, 2021
- [AMDGPU][SimplifyCFG] Teach AMDGPUUnifyDivergentExitNodes to preserve {,Post}DomTree · 4b806473
  Roman Lebedev authored Jan 01, 2021
  4b806473
- [TableGen] Continue cleaning up .td files · f4c39ccd
  Paul C. Anagnostopoulos authored Dec 24, 2020
  f4c39ccd
Dec 31, 2020
- [MemorySSA, BPF] Use isa instead of dyn_cast (NFC) · b557c32a
  Kazu Hirata authored Dec 31, 2020
  
  b557c32a
- Support tilezero intrinsic and c interface for AMX. · 08665b18
  Luo, Yuanke authored Dec 08, 2020
  08665b18
- [RISCV] Define vector single-width type-convert intrinsic. · 1d04cbeb
  Monk Chiang authored Dec 31, 2020
  1d04cbeb
- [RISCV] Define vector narrowing type-convert intrinsic. · 2aed9bc9
  Monk Chiang authored Dec 31, 2020
  2aed9bc9
- [RISCV] Define vector widening type-convert intrinsic. · fdd30faa
  Monk Chiang authored Dec 31, 2020
  fdd30faa
- [X86] Don't fold negative offset into 32-bit absolute address (e.g. movl $foo-1, %eax) · 6be0b9a8
  Fangrui Song authored Dec 30, 2020
  6be0b9a8
- [ARM] Declare Op within an if statement (NFC) · 331c28f6
  Kazu Hirata authored Dec 30, 2020
  
  331c28f6
- [TargetMachine] Drop implied dso_local for definitions in ELF static relocation model/PIE · 2047c10c
  Fangrui Song authored Dec 30, 2020
  2047c10c
Dec 30, 2020
- [X86][AMX] Fix compilation warning introduced by 981a0bd8 . · 16c2067c
  Wang, Pengfei authored Dec 30, 2020
  
  16c2067c
- clang-format, address warnings · 420d046d
  Juneyoung Lee authored Dec 30, 2020
  
  420d046d