llvm-svn: 305953

For consistency with other MC*Streamer.cpp files and
the header file.

Differential Revision: https://reviews.llvm.org/D34466

llvm-svn: 305952

llvm-svn: 305951

llvm-svn: 305950

Patch by John Baldwin < jhb at freebsd dot org >!

Differential Revision:  https://reviews.llvm.org/D34452

llvm-svn: 305949

Patch by Fedor Sergeev.

Differential Revision:  https://reviews.llvm.org/D33868

llvm-svn: 305948

Done to remove noise from https://reviews.llvm.org/D32332 (and to make
this test more resilient to changes in general).

llvm-svn: 305947

[Reassociate] Use early returns in a couple places to reduce indentation and improve readability. NFC

llvm-svn: 305946

llvm-svn: 305945

(consumer).

Reviewer: aprantl

Differential Revision:  https://reviews.llvm.org/D34418

llvm-svn: 305944

llvm-svn: 305943

The bug that was causing this to fail was fixed in r305429.

llvm-svn: 305942

[InstCombine] Cleanup using commutable matchers. Make a couple helper methods standalone static functions. Put 'if' around variable declaration instead of after. NFC

llvm-svn: 305941

[preprocessor] Fix assertion hit when 'SingleFileParseMode' option is enabled and #if with an undefined identifier and without #else

'HandleEndifDirective' asserts that 'WasSkipping' is false, so switch to using 'FoundNonSkip' as the hint for 'SingleFileParseMode' to keep going with parsing.

llvm-svn: 305940

This attribute is used to ensure the guard page is triggered on stack
overflow. Stack frames larger than the guard page size will generate
a call to __probestack to touch each page so the guard page won't
be skipped.

Reviewed By: majnemer

Differential Revision: https://reviews.llvm.org/D34386

llvm-svn: 305939

Using various methods, BasicAA tries to determine whether two
GetElementPtr memory locations alias when its base pointers are known
to be equal. When none of its heuristics are applicable, it falls back
to PartialAlias to, according to a comment, protect TBAA making a wrong
decision in case of unions and malloc. PartialAlias is not correct,
because a PartialAlias result implies that some, but not all, bytes
overlap which is not necessarily the case here.

AAResults returns the first analysis result that is not MayAlias.
BasicAA is always the first alias analysis. When it returns
PartialAlias, no other analysis is queried to give a more exact result
(which was the intention of returning PartialAlias instead of MayAlias).
For instance, ScopedAA could return a more accurate result.

The PartialAlias hack was introduced in r131781 (and re-applied in
r132632 after some reverts) to fix llvm.org/PR9971 where TBAA returns a
wrong NoAlias result due to a union. A test case for the malloc case
mentioned in the comment was not provided and I don't think it is
affected since it returns an omnipotent char anyway.

Since r303851 (https://reviews.llvm.org/D33328) clang does emit specific
TBAA for unions anymore (but "omnipotent char" instead). Hence, the
PartialAlias workaround is not required anymore.

This patch passes the test-suite and check-llvm/check-clang of a
self-hoisted build on x64.

Reviewed By: hfinkel

Differential Revision: https://reviews.llvm.org/D34318

llvm-svn: 305938

This will be needed in order to share the irsymtab string table with
the bitcode string table.

Differential Revision: https://reviews.llvm.org/D33971

llvm-svn: 305937

llvm-svn: 305936

llvm-svn: 305935

Summary: r305009 disables recursive inlining for indirect calls in sample loader pass. The same logic applies to direct recursive calls.

Reviewers: iteratee, davidxl

Reviewed By: iteratee

Subscribers: sanjoy, llvm-commits, eraman

Differential Revision: https://reviews.llvm.org/D34456

llvm-svn: 305934

Summary:
The main complexity in adding symbol records is that we need to
"relocate" all the type indices. Type indices do not have anything like
relocations, an opaque data structure describing where to find existing
type indices for fixups. The linker just has to "know" where the type
references are in the symbol records. I added an overload of
`discoverTypeIndices` that works on symbol records, and it seems to be
able to link the standard library.

Reviewers: zturner, ruiu

Subscribers: llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D34432

llvm-svn: 305933

Define target hook isReallyTriviallyReMaterializable() to explicitly specify
PowerPC instructions that are trivially rematerializable.  This will allow
the MachineLICM pass to accurately identify PPC instructions that should always
be hoisted.

Differential Revision: https://reviews.llvm.org/D34255

llvm-svn: 305932

I don't think there's any visible difference from having the wrong layout
for the 32-bit case at this point, but that could change in the future.

llvm-svn: 305931

If we want to make sure that a particular string is not in an output,
the regular way of doing it is to add `-NOT` prefix instead of checking
if FileCheck resulted in an error.

Differential Revision: https://reviews.llvm.org/D34435

llvm-svn: 305930

This works around a strange interaction with Authenticode signatures,
in which a signed PE executable with {Major,Minor}LinkerVersion = 0.0
fails to validate on Windows 7 (but is OK on Windows 10). Setting the
linker version to 14.0 (which is what VS2015 outputs) makes it work
again.

Patch by Simon Tatham <simon.tatham@arm.com>.

llvm-svn: 305929

In running some internal vectorcall tests in 32 bit mode, we discovered that the 
behavior I'd previously implemented for x64 (and applied to x32) regarding the 
assignment of SSE registers was incorrect. See spec here: 
https://msdn.microsoft.com/en-us/library/dn375768.aspx

My previous implementation applied register argument position from the x64 
version to both. This isn't correct for x86, so this removes and refactors that 
section. Additionally, it corrects the integer/int-pointer assignments. Unlike 
x64, x86 permits integers to be assigned independent of position.

Finally, the code for 32 bit was cleaned up a little to clarify the intent, 
as well as given a descriptive comment.

Differential Revision: https://reviews.llvm.org/D34455

llvm-svn: 305928

Summary:
I noticed that passing known bits across these intrinsics isn't great at capturing the information we really know. Turning known bits of the input into known bits of a count output isn't able to convey a lot of what we really know.

This patch adds range metadata to these intrinsics based on the known bits.

Currently the patch punts if we already have range metadata present.

Reviewers: spatel, RKSimon, davide, majnemer

Reviewed By: RKSimon

Subscribers: sanjoy, hfinkel, llvm-commits

Differential Revision: https://reviews.llvm.org/D32582

llvm-svn: 305927

[InstCombine] Don't let folding (select (icmp eq (and X, C1), 0), Y, (or Y, C2)) create more instructions than it removes

Summary:
Previously this folding had no checks to see if it was going to result in less instructions. This was pointed out during the review of D34184

This patch adds code to count how many instructions its going to create vs how many its going to remove so we can make a proper decision.

Reviewers: spatel, majnemer

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34437

llvm-svn: 305926

Summary: This patch adds support for xors of splat vectors.

Reviewers: mcrosier

Reviewed By: mcrosier

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D34354

llvm-svn: 305925

Change -1LL to -1ULL to silence a gcc warning about left shifting a negative value. Fixes https://bugs.llvm.org/show_bug.cgi?id=33358

llvm-svn: 305924

See Bug 33509: https://bugs.llvm.org//show_bug.cgi?id=33509

Reviewers: Sam Kolton, Artem Tamazov, Valery Pykhtin

Differential Revision: https://reviews.llvm.org/D34360

llvm-svn: 305923

Summary:
AFAICT compiler-rt doesn't have a function that would return 'good' random
bytes to seed a PRNG. Currently, the `SizeClassAllocator64` uses addresses
returned by `mmap` to seed its PRNG, which is not ideal, and  
`SizeClassAllocator32` doesn't benefit from the entropy offered by its 64-bit
counterpart address space, so right now it has nothing. This function aims at
solving this, allowing to implement good 32-bit chunk randomization. Scudo also
has a function that does this for Cookie purposes, which would go away in a
later CL once this lands.

This function will try the `getrandom` syscall if available, and fallback to
`/dev/urandom` if not.

Unfortunately, I do not have a way to implement and test a Mac and Windows
version, so those are unimplemented as of now. Note that `kRandomShuffleChunks`
is only used on Linux for now.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: zturner, rnk, llvm-commits, kubamracek

Differential Revision: https://reviews.llvm.org/D34412

llvm-svn: 305922

Move BaseIndexOffset analysis out of DAGCombiner for use in other
files.

llvm-svn: 305921

The --exclude-libs option is not a popular option, but at least some
programs in Android depend on it, so it's worth to support it.

Differential Revision: https://reviews.llvm.org/D34422

llvm-svn: 305920

Post commit review feedback from Justin Bogner

llvm-svn: 305919

Added test file for ARMv8.1 LSE Atomics that I forgot to include in
commit r305893.

Patch by Ananth Jasty.

Differential Revision: https://reviews.llvm.org/D33586

Change-Id: Ic1ad8ed87c1b584c4c791b459a686c866a3c3087
llvm-svn: 305918

Move GlobalAddress Offset decomposition from initial match into
comparision check and removing the possibility of constructing a new
offseted global address when examining addresses.

llvm-svn: 305917

Use triple and attribute only for consistency 

llvm-svn: 305916

[AMDGPU][MC] Corrected V_*QSAD* instructions to check that dest register is different than any of the src

See Bug 33279: https://bugs.llvm.org//show_bug.cgi?id=33279

Reviewers: artem.tamazov, vpykhtin

Differential Revision: https://reviews.llvm.org/D34003

llvm-svn: 305915

llvm-svn: 305914