Commits · 616289ed29225c0ddfe5699c7fdf42a0fcbe0ab4 · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 01, 2020
- [LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHG · 616289ed
  Jessica Clarke authored Apr 01, 2020
  616289ed
- [Alignment][NFC] Remove remaining uses of MachineFrameInfo::setObjectAlignment · fc63c4d8
  Guillaume Chatelet authored Apr 01, 2020
  fc63c4d8
- [X86][SSE] combinePTESTCC - fold TESTZ(X,~Y) -> TESTC(Y,X) · eb888056
  Simon Pilgrim authored Apr 01, 2020
  
  eb888056
- [Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign() · 1dffa255
  Guillaume Chatelet authored Apr 01, 2020
  1dffa255
- Fix operator precedence warning. NFCI. · be7a233e
  Simon Pilgrim authored Apr 01, 2020
  
  be7a233e
- Fix unused variable warnings. NFCI. · 552e46ea
  Simon Pilgrim authored Apr 01, 2020
  
  552e46ea
- [ARM] Silence warning in Release builds · b605c56b
  Benjamin Kramer authored Apr 01, 2020
  b605c56b
- [Alignment][NFC] Convert SelectionDAG::InferPtrAlignment to MaybeAlign · 3a78f44d
  Guillaume Chatelet authored Apr 01, 2020
  3a78f44d
- [X86][SSE] matchShuffleWithPACK - generalize zero/signbits matching for any packed src type · 481413d3
  Simon Pilgrim authored Apr 01, 2020
  481413d3
- [Target][ARM] Improvements to the VPT Block Insertion Pass · 2effe8f5
  Pierre-vh authored Mar 09, 2020
  2effe8f5
- [Target][ARM] Change VPTMaskValues to the correct encoding · dad84828
  Pierre-vh authored Mar 13, 2020
  dad84828
- [X86][SSE] Handle basic inversion of PTEST/TESTP operands (PR38522) · 918ccb64
  Simon Pilgrim authored Apr 01, 2020
  918ccb64
- [X86] Do not assume types are legal in getFauxShuffleMask · ef49895d
  Bjorn Pettersson authored Mar 31, 2020
  ef49895d
- [Alignment][NFC] Use Align in SelectionDAG::getMemIntrinsicNode · c7468c16
  Guillaume Chatelet authored Mar 31, 2020
  c7468c16
- [VectorUtils][X86] De-templatize scaleShuffleMask and 2 X86 shuffle mask... · f92563f9
  Craig Topper authored Mar 31, 2020
  f92563f9
- [X86][AVX] Add additional 256/512-bit test cases for PACKSS/PACKUS shuffle patterns · f9f401db
  Simon Pilgrim authored Mar 31, 2020
  f9f401db
- [RISCV] Split RISCVISelDAGToDAG.cpp to RISCVISelDAGToDAG.h and RISCVISelDAGToDAG.cpp · af0cd907
  Shiva Chen authored Mar 31, 2020
  af0cd907
- [PowerPC] Don't generate ST_VSR_SCAL_INT if power8-vector is disabled · 8eb40e41
  Kai Luo authored Apr 01, 2020
  8eb40e41
- [X86][MC] Disable Prefix padding after hardcode/prefix · d0efd7bf
  Shengchen Kan authored Mar 31, 2020
  d0efd7bf
- AMDGPU/GlobalISel: Fix insert point when lowering G_FMAD · 43e57659
  Matt Arsenault authored Mar 31, 2020
  
  43e57659
- [PPCInstPrinter] Print conditional branches as `bt 2, $target` instead of `bt 2, .+$imm` · 4af7560b
  Fangrui Song authored Mar 26, 2020
  4af7560b
Mar 31, 2020
- [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object · 494abe13
  Daniel Frampton authored Mar 31, 2020
  494abe13
- [AArch64] Fix mismatch in prologue and epilogue for funclets on Windows · 522b4c4b
  Daniel Frampton authored Mar 31, 2020
  522b4c4b
- Remove "mask" operand from shufflevector. · 1ee6ec2b
  Eli Friedman authored Mar 31, 2020
  1ee6ec2b
- [AArch64][SVE] Add support for fcmp. · dacf8d35
  Eli Friedman authored Mar 26, 2020
  dacf8d35
- [AMDGPU] Define 16 bit VGPR subregs · 08682dcc
  Stanislav Mekhanoshin authored Feb 05, 2020
  08682dcc
- [SystemZ] Allow %r0 in address context for AsmParser · c726c920
  Ulrich Weigand authored Mar 31, 2020
  c726c920
- [Alignment][NFC] Deprecate MachineMemOperand::getMachineMemOperand version... · 998118c3
  Guillaume Chatelet authored Mar 31, 2020
  998118c3
- [SystemZ] Add isCommutable flag on VFA and VFM. · 665bebb4
  Jonas Paulsson authored Mar 31, 2020
  665bebb4
- [SystemZ] Improve foldMemoryOperandImpl(). · f481d488
  Jonas Paulsson authored Mar 17, 2020
  f481d488
- Revert rGefe59d6717dcdf7777acb9b7a734e1a520bdf22a "[X86][SSE]... · 7e0e5fa4
  Simon Pilgrim authored Mar 31, 2020
  7e0e5fa4
- Fix enumeral mismatch warning. NFCI. · 38619fa7
  Simon Pilgrim authored Mar 31, 2020
  38619fa7
- [X86][SSE] lowerShuffleWithPACK - extend to use chained PACKs for larger truncations · efe59d67
  Simon Pilgrim authored Mar 31, 2020
  efe59d67
- [Alignment][NFC] Transitionning more getMachineMemOperand call sites · b9810988
  Guillaume Chatelet authored Mar 31, 2020
  b9810988
- [X86] Combine concat(palignr,palignr) -> palignr(concat,concat) · 98357dee
  Simon Pilgrim authored Mar 31, 2020
  98357dee
- [X86] Move canLowerByDroppingEvenElements earlier to be with matchShuffleWithPACK. NFCI. · 7a4a98a9
  Simon Pilgrim authored Mar 30, 2020
  7a4a98a9
- [ARM] Fix qdadd operand order · 2c5f43f9
  David Green authored Mar 30, 2020
  2c5f43f9
- [Alignment][NFC] Transitionning more getMachineMemOperand call sites · c9d5c195
  Guillaume Chatelet authored Mar 31, 2020
  c9d5c195
- [AMDGPU] New llvm.amdgcn.ballot intrinsic · 5d3a69fe
  Sebastian Neubauer authored Mar 05, 2020
  5d3a69fe
- [RISCV] ELF attribute section for RISC-V. · 581ba352
  Kai Wang authored Feb 04, 2020
  581ba352