llvm-svn: 135440

use of TargetFrameLowering in TargetAsmInfo.

llvm-svn: 135439

better location welcome).

llvm-svn: 135438

llvm-svn: 135437

llvm-svn: 135436

Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause decoding conflicts in the new-style disassembler.

llvm-svn: 135434

llvm-svn: 135432

errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

llvm-svn: 135431

llvm-svn: 135430

Cabecinhas.

llvm-svn: 135429

Reported by: Chad Rosier <mcrosier@apple.com>

llvm-svn: 135428

llvm-svn: 135427

llvm-svn: 135426

llvm-svn: 135425

to MCRegisterInfo. Also initialize the mapping at construction time.

This patch eliminate TargetRegisterInfo from TargetAsmInfo. It's another step
towards fixing the layering violation.

llvm-svn: 135424

During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
[take 2]

llvm-svn: 135423

for the tests that open new data files.

llvm-svn: 135422

llvm-svn: 135421

For -disable-iv-rewrite, perform LFTR without generating a new
"canonical" induction variable. Instead find the "best" existing
induction variable for use in the loop exit test and compute the final
value of that IV for use in the new loop exit test. In short,
convert to a simple eq/ne exit test as long as it's cheap to do so.

llvm-svn: 135420

llvm-svn: 135419

llvm-svn: 135418

llvm-svn: 135417

Add two new interface files SBValue.i and SBValueList.i, instead of directly swigging the header files.

llvm-svn: 135416

moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.

llvm-svn: 135415

Original Log: Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tBLXr, using pseudo-instructions to lower to the single final opcode.  Update the ARM disassembler for this change.

llvm-svn: 135414

When splitting a live range immediately before an LDR_POST instruction
that redefines the address register, make sure to use the correct value
number in leaveIntvBefore.

We need the value number entering the instruction.

<rdar://problem/9793765>

llvm-svn: 135413

not interfere with BackedgeTakenCount computation.

llvm-svn: 135412

std::underlying_type.

llvm-svn: 135410

preheader for the sole purpose of LFTR, since LFTR itself is usually not
a clear optimization.

llvm-svn: 135409

definitions.

llvm-svn: 135407

llvm-svn: 135405

llvm-svn: 135404

virtual registers are used. 

llvm-svn: 135403

__underlying_type feature.

llvm-svn: 135402

correctly impelmented

llvm-svn: 135401

itself non-throwing.  Since nested_exception's destructor is
non-throwing, if B's destructor is not, this causes an error in C++03
mode due to the overriding function having a more lax specification.
This did not occur in C++0x mode as A's destructor was implicitly
non-throwing.

llvm-svn: 135400

Make all of the RecTy constructors private, and use get() factory
methods instead. Return singleton instances when it makes sense.

ListTy instance pointers are stored in the element RecTy instance.

BitsRecTy instance pointers, one per length, are stored in a static vector.

Also unique DefInit instances. A Record has a unique DefInit which
has a unique RecordRecTy instance.

This saves some 200k-300k RecTy allocations when parsing ARM.td. It
reduces TableGen's heap usage by almost 50%.

llvm-svn: 135399

diagnostics.

llvm-svn: 135398

llvm-svn: 135397

llvm-svn: 135396