Assign yours truely as code owner for the upcoming M68k target

Differential Revision: https://reviews.llvm.org/D95315

Discussion: https://lists.llvm.org/pipermail/llvm-dev/2021-January/147603.html

This patch introduce files that just enough for lib/Target/CSKY to compile.
Notably a basic CSKYTargetMachine and CSKYTargetInfo.

Differential Revision: https://reviews.llvm.org/D88466

I contacted Jakob Olesen about TableGen and he replied that he is no longer involved with the project.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D84958

The original author isn't active, and I've made most of the commits to
it.

This was discussed on llvm-dev thread "Transferring code ownership for SCEV and IndVars" a few months back.  I just forgot to make the actual change.

Summary:
This patch registers the 've' target: the NEC SX-Aurora TSUBASA Vector Engine.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D69103

llvm-svn: 364793

Summary: See PR38731.

Reviewers: andreadb

Subscribers: mgorny, javed.absar, tschuett, gbedwell, andreadb, RKSimon, llvm-commits

Differential Revision: https://reviews.llvm.org/D55557

llvm-svn: 349332

llvm-svn: 347847

llvm-svn: 339394

As agreed with Simon Dardis, I'm taking over as a code owner
for the MIPS backend.

llvm-svn: 335213

NFC

llvm-svn: 330631

llvm-svn: 330410

llvm-svn: 330171

llvm-svn: 316651

Add the ARC backend as an experimental target to lib/Target.
Reviewed at: https://reviews.llvm.org/D36331

llvm-svn: 311667

llvm-svn: 311581

It served us well, helped kick-start much of the vectorization efforts
in LLVM, etc. Its time has come and past. Back in 2014:
http://lists.llvm.org/pipermail/llvm-dev/2014-November/079091.html

Time to actually let go and move forward. =]

I've updated the release notes both about the removal and the
deprecation of the corresponding C API.

llvm-svn: 306797

llvm-svn: 306197

llvm-svn: 297490

llvm-svn: 297489

llvm-svn: 295259

Also clean up description.

llvm-svn: 294624

llvm-svn: 294516

llvm-svn: 294436

llvm-svn: 288500

llvm-svn: 288268

llvm-svn: 286710

llvm-svn: 286269

This contains just enough for lib/Target/RISCV to compile. Notably a basic 
RISCVTargetMachine and RISCVTargetInfo. At this point you can attempt llc 
-march=riscv32 myinput.ll and will find it fails due to the lack of 
MCAsmInfo.

See http://lists.llvm.org/pipermail/llvm-dev/2016-August/103748.html for 
further discussion

Differential Revision: https://reviews.llvm.org/D23560

llvm-svn: 285712

llvm-svn: 281628

llvm-svn: 280667

llvm-svn: 277503