Commits · 79a1fd718c71b4480dc9f00e8e77f4408ec9e6fa · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 14, 2016
- AMDGPU: allow specifying a workgroup size that needs to fit in a compute unit · 79a1fd71
  Tom Stellard authored Apr 14, 2016
  79a1fd71
- AMDGPU/SI: Use the correct scratch wave offset register for shaders. · f110f8f9
  Tom Stellard authored Apr 14, 2016
  f110f8f9
- AMDGPU: Implement canonicalize · 9cd90712
  Matt Arsenault authored Apr 14, 2016
  9cd90712
Apr 13, 2016
- AMDGPU/SI: Add support for spilling VGPRs without having to scavenge registers · b951f107
  Tom Stellard authored Apr 13, 2016
  b951f107
- [AMDGPU][llvm-mc] Support of Trap Handler registers (TTMP0..11 and TBA/TMA)git status · eb4d5a9b
  Artem Tamazov authored Apr 13, 2016
  eb4d5a9b
- AMDGPU/SI: Fix spilling of 96-bit registers · 703b2ec4
  Tom Stellard authored Apr 12, 2016
  703b2ec4
Apr 12, 2016
- AMDGPU: add llvm.amdgcn.buffer.load/store intrinsics · df77c9ad
  Nicolai Haehnle authored Apr 12, 2016
  df77c9ad
- AMDGPU/SI: Insert wait states required after v_readfirstlane on SI · ab1d3a9d
  Tom Stellard authored Apr 12, 2016
  ab1d3a9d
- AMDGPU: Eliminate half of i64 or if one operand is zero_extend from i32 · 3b08238f
  Matt Arsenault authored Apr 12, 2016
  3b08238f
- AMDGPU/SI: Fix a mis-compilation of multi-level breaks · 279970c0
  Nicolai Haehnle authored Apr 12, 2016
  279970c0
- AMDGPU: Implement i64 global atomics · 64fa2f45
  Matt Arsenault authored Apr 12, 2016
  64fa2f45
- AMDGPU: Add atomic_inc + atomic_dec intrinsics · a9dbdcae
  Matt Arsenault authored Apr 12, 2016
  a9dbdcae
- AMDGPU: Remove trailing whitespace · 21ecfe43
  Matt Arsenault authored Apr 12, 2016
  21ecfe43
Apr 11, 2016
- Revert "AMDGPU/SI: Do not generate s_waitcnt after ds_permute/ds_bpermute" · 0ffdf65e
  Tom Stellard authored Apr 11, 2016
  0ffdf65e
Apr 07, 2016
- AMDGPU/SI: Implement atomic load/store for i32 and i64 · 43b7b5b8
  Jan Vesely authored Apr 07, 2016
  43b7b5b8
- AMDGPU/SI: Add latency for export instructions · 91127580
  Tom Stellard authored Apr 07, 2016
  91127580
- AMDGPU/SI: Add MachineBasicBlock parameter to SIInstrInfo::insertWaitStates · d37630e4
  Tom Stellard authored Apr 07, 2016
  d37630e4
- [AMDGPU] fix readlane/readfirstlane src vgpr operand type. · e23b6deb
  Valery Pykhtin authored Apr 07, 2016
  e23b6deb
- Make helper functions static. NFC. · 4fb78518
  Benjamin Kramer authored Apr 07, 2016
  4fb78518
Apr 06, 2016
- AMDGPU: Add a shader calling convention · df3a20cd
  Nicolai Haehnle authored Apr 06, 2016
  df3a20cd
- [AMDGPU] AsmParser: disable DPP for unsupported instructions. New dpp tests. Fix v_nop_dpp. · ff90c60a
  Sam Kolton authored Apr 06, 2016
  ff90c60a
- RegisterScavenger: Take a reference as enterBasicBlock() argument. · 7dc03f06
  Matthias Braun authored Apr 06, 2016
  7dc03f06
Apr 05, 2016
- [AMDGPU] Emit linkonce and linkonce_odr symbols · e63e02cb
  Konstantin Zhuravlyov authored Apr 05, 2016
  e63e02cb
Apr 01, 2016
- AMDGPU: Implement {BUFFER,FLAT}_ATOMIC_CMPSWAP{,_X2} · 354a43c7
  Tom Stellard authored Apr 01, 2016
  354a43c7
- [AMDGPU] fix MADAK/MADMK instructions operand namings to match encoding fields. · 5b3559c1
  Valery Pykhtin authored Apr 01, 2016
  5b3559c1
Mar 31, 2016
- [AMDGPU] Disassembler: support for DPP · 1048fb18
  Sam Kolton authored Mar 31, 2016
  1048fb18
- AMDGPU: Add frexp_exp intrinsic · 2fe4fbc1
  Matt Arsenault authored Mar 30, 2016
  2fe4fbc1
Mar 30, 2016
- Silencing warnings from MSVC 2015 Update 2. All of these changes silence... · ef0fe1ee
  Aaron Ballman authored Mar 30, 2016
  ef0fe1ee
- AMDGPU/SI: Improve MachineSchedModel definition · 1d5e6d4b
  Tom Stellard authored Mar 30, 2016
  1d5e6d4b
- AMDGPU/SI: Enable lanemask tracking in misched · 0bc954e3
  Tom Stellard authored Mar 30, 2016
  0bc954e3
Mar 29, 2016
- Test commit access · ecc7cbf6
  Konstantin Zhuravlyov authored Mar 29, 2016
  ecc7cbf6
Mar 28, 2016
- AMDGPU/SI: Limit load clustering to 16 bytes instead of 4 instructions · a76bcc2e
  Tom Stellard authored Mar 28, 2016
  a76bcc2e
Mar 25, 2016
- AMDGPU: Fix a use-after free and a missing break · f2a0d349
  Justin Bogner authored Mar 25, 2016
  f2a0d349
- AMDGPU: Cost model for basic integer operations · 8c8fcb25
  Matt Arsenault authored Mar 25, 2016
  8c8fcb25
- AMDGPU: Partially implement getArithmeticInstrCost for FP ops · 9651813e
  Matt Arsenault authored Mar 25, 2016
  9651813e
- AMDGPU: TTI: Make insertelement free. · 59767cea
  Matt Arsenault authored Mar 25, 2016
  59767cea
Mar 24, 2016
- AMDGPU/SI: Add Polaris support · 9babad25
  Tom Stellard authored Mar 24, 2016
  9babad25
- Fix sequence point warning. NFC. · b8a37205
  Vasileios Kalintiris authored Mar 24, 2016
  b8a37205
- AMDGPU: Remove atomic inc/dec patterns · 30d37a74
  Matt Arsenault authored Mar 23, 2016
  30d37a74
- AMDGPU: Promote alloca should skip volatiles · 0a30e456
  Matt Arsenault authored Mar 23, 2016
  0a30e456