Commits · 7f618f49822ca6e3437ca19ad9a0840cc869cd44 · Lorenzo Albano / LLVM bpEVL · GitLab

Aug 20, 2005
- Add support for TargetGlobalAddress nodes · 1be7edde
  Chris Lattner authored Aug 19, 2005
  1be7edde
Aug 19, 2005
- Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows · 6d7f814b
  Chris Lattner authored Aug 19, 2005
  6d7f814b
- Fix a bug in previous commit · 0875d1ab
  Chris Lattner authored Aug 19, 2005
  0875d1ab
- Fix a typeo, no wonder all tokenfactor edges were the same! · 65d66797
  Chris Lattner authored Aug 19, 2005
  65d66797
- Print physreg register nodes with target names (e.g. F1) instead of numbers · 4990335e
  Chris Lattner authored Aug 19, 2005
  4990335e
- Before implementing copyfromreg, we'll implement copytoreg correctly. · 78b200eb
  Chris Lattner authored Aug 19, 2005
  78b200eb
- Now that we have operand info for machine instructions, use it to create · cc3035e9
  Chris Lattner authored Aug 19, 2005
  cc3035e9
- Split RegisterClass 'Methods' into MethodProtos and MethodBodies · bd26a820
  Chris Lattner authored Aug 19, 2005
  bd26a820
- put reg classes into namespace · 248933eb
  Chris Lattner authored Aug 19, 2005
  248933eb
- Put reg classes into namespaces · 1dee9b16
  Chris Lattner authored Aug 19, 2005
  1dee9b16
- Put register classes into namespaces · 757a770a
  Chris Lattner authored Aug 19, 2005
  757a770a
- Put register classes in namespaces · 8975de18
  Chris Lattner authored Aug 19, 2005
  8975de18
- Fix code that assumes the register info will be dumped into a target · dc89d6be
  Chris Lattner authored Aug 19, 2005
  dc89d6be
- put reg classes in namespaces · cca0503c
  Chris Lattner authored Aug 19, 2005
  cca0503c
- Require that targets specify a namespace for their register classes. · 3fb85f27
  Chris Lattner authored Aug 19, 2005
  3fb85f27
- The skeleton target has never had an isel · 32626736
  Chris Lattner authored Aug 19, 2005
  32626736
- This code has always been dead on itanium · f391f286
  Chris Lattner authored Aug 19, 2005
  f391f286
- This code has always been dead for alpha · 0faf0b73
  Chris Lattner authored Aug 19, 2005
  0faf0b73
- The simple isel being gone makes this dead! · 8ad3700a
  Chris Lattner authored Aug 19, 2005
  8ad3700a
- Now that the simple isels are dead, so is this. · ef6d8d8e
  Chris Lattner authored Aug 19, 2005
  ef6d8d8e
- Sparcv9 gets no operand info · 63143a06
  Chris Lattner authored Aug 19, 2005
  63143a06
- Fix VC++ constant truncation warning. · 486e36cf
  Jeff Cohen authored Aug 19, 2005
  486e36cf
- a bugfix (up top) and a quick repair job: disable generation of dep.z · fcbb3807
  Duraid Madina authored Aug 19, 2005
  fcbb3807
- Fix VC++ precedence warning. · d1f22b12
  Jeff Cohen authored Aug 19, 2005
  d1f22b12
- Fix a bug where we were passing the wrong number of arguments to an · ce400dac
  Nate Begeman authored Aug 19, 2005
  ce400dac
- Fix computation of # operands, add a temporary hack for CopyToReg · d18beab9
  Chris Lattner authored Aug 19, 2005
  d18beab9
- mark variable arity instructions as such. Alpha wins the battle for · 8cbddfc8
  Chris Lattner authored Aug 19, 2005
  8cbddfc8
- Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. · 3e0335c9
  Chris Lattner authored Aug 19, 2005
  3e0335c9
- add a few missing cases · 423d7cbb
  Chris Lattner authored Aug 19, 2005
  423d7cbb
- Give ADJCALLSTACKDOWN/UP the correct operands. · e2967ac5
  Chris Lattner authored Aug 19, 2005
  e2967ac5
- ISD::OR, and it's accompanying SelectBitfieldInsert · 93c4bc6d
  Nate Begeman authored Aug 19, 2005
  93c4bc6d
- The variable SAR's only take one operand too · a9d68f14
  Chris Lattner authored Aug 19, 2005
  a9d68f14
- Stop adding bogus operands to variable shifts on X86. These instructions · 14569592
  Chris Lattner authored Aug 19, 2005
  14569592
- Remove the X86 and PowerPC Simple instruction selectors; their time has · be1f314a
  Nate Begeman authored Aug 18, 2005
  be1f314a
- Add shifts. · 33acb2c1
  Nate Begeman authored Aug 18, 2005
  33acb2c1
- Fix operand numbers by marking variable arity nodes as such and by fixing · 4bd805e7
  Chris Lattner authored Aug 18, 2005
  4bd805e7
- MFLR doesn't take an operand, the LR register is implicit · 51e851d0
  Chris Lattner authored Aug 18, 2005
  51e851d0
- Add a new flag · 5cfa3779
  Chris Lattner authored Aug 18, 2005
  5cfa3779
Aug 18, 2005
- add a new -view-sched-dags option to view dags as they are sent to the scheduler. · 0c8c2c10
  Chris Lattner authored Aug 18, 2005
  0c8c2c10
- Move this to the emitter · 4e00ff6e
  Chris Lattner authored Aug 18, 2005
  4e00ff6e