Reported by Raul Herbster.

llvm-svn: 36262

llvm-svn: 36222

llvm-svn: 36203

target for tabs checking.

llvm-svn: 36146

llvm-svn: 35962

llvm-svn: 35909

llvm-svn: 35859

llvm-svn: 35846

llvm-svn: 35840

llvm-svn: 35640

llvm-svn: 35639

llvm-svn: 35635

llvm-svn: 35627

llvm-svn: 35619

CodeGen/ARM/arm-negative-stride.ll to:

LBB1_2: @bb
        str r1, [r3, -r0, lsl #2]
        add r0, r0, #1
        cmp r0, r2
        bne LBB1_2      @bb

llvm-svn: 35609

llvm-svn: 35602

to be folded into non-store instructions.

llvm-svn: 35601

llvm-svn: 35598

flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).

llvm-svn: 35573

llvm-svn: 35551

llvm-svn: 35521

llvm-svn: 35480

llvm-svn: 35479

llvm-svn: 35448

llvm-svn: 35406

llvm-svn: 35381

llvm-svn: 35366

not just the first letter.  No functionality change.

llvm-svn: 35322

llvm-svn: 35245

llvm-svn: 35229

instructions (that would have to be split later)

llvm-svn: 35227

    mov lr, pc
    bx lr
So, the function was not called.

llvm-svn: 35218

Make two piece constant generation as a single instruction. It's re-materialized as a load from constantpool.

llvm-svn: 35207

llvm-svn: 35206

llvm-svn: 35205

llvm-svn: 35202

llvm-svn: 35196

llvm-svn: 35163

rematerializable. Only used for constant generation for now.

llvm-svn: 35162

llvm-svn: 35161