- Nov 09, 2016
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Krzysztof Parzyszek authored
For pairs of 32-bit registers: isub_lo, isub_hi. For pairs of vector registers: vsub_lo, vsub_hi. Add generic subreg indices: ps_sub_lo, ps_sub_hi, and a function HexagonRegisterInfo::getHexagonSubRegIndex(RegClass, GenericSubreg) that returns the appropriate subreg index for RegClass. llvm-svn: 286377
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Krzysztof Parzyszek authored
llvm-svn: 286368
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Jonas Paulsson authored
Review: U Weigand llvm-svn: 286362
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Pavel Labath authored
llvm-svn: 286361
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Pavel Labath authored
The default duration constructor does not zero-initialize the object, we need to do that manually. llvm-svn: 286359
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Pavel Labath authored
Summary: All changes are pretty straight-forward. I chose to use TimePoints with second precision, as that is all that seems to be required here. Reviewers: friss, zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25908 llvm-svn: 286358
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Simon Atanasyan authored
llvm-svn: 286351
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Jonas Paulsson authored
The name/comment of the third argument to the ScheduleDAGMI constructor is RemoveKillFlags and not IsPostRA. Only the comments are changed. Review: A Trick llvm-svn: 286350
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Alexandros Lamprineas authored
Scalar Evolution asserts when not all the operands of an Add Recurrence Expression are loop invariants. Loop Strength Reduction should only create affine Add Recurrences, so that both the start and the step of the expression are loop invariants. Differential Revision: https://reviews.llvm.org/D26185 llvm-svn: 286347
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Craig Topper authored
This patch adds support for fptoui to 2i32 from both 2f64 and 2f32, building on Simon's change for the signed version in r284459 and using AVX-512 instructions. If we don't have VLX support we need to use a 512-bit operation for v2f64->v2i32 and extract the result. It also recognises that cvttpd2udq zeroes the upper 64-bits of the xmm result. Differential Revision: https://reviews.llvm.org/D26331 llvm-svn: 286345
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Craig Topper authored
Summary: This allows the SSE intrinsic to use the EVEX instruction when available. It also fixes EVEX to not use a weird (v4i32 (fp_to_sint v2f64)) node and it merges some isel patterns. This also fixes some cases that weren't combining vzmovl with cvttpd2dq to remove extra moves. Reviewers: delena, zvi, RKSimon Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26330 llvm-svn: 286344
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Craig Topper authored
[AVX-512] Add more varied alignments to tests for storing the lower 128-bits of a 256 or 512-bit subvector extract. llvm-svn: 286343
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Craig Topper authored
[AVX-512] Use alignedstore256 in patterns that look for stores of the lower 256-bits of a 512-bit vector to use a 256-bit aligned store. Previously we were only checking for 16 byte alignment instead of 32 byte alignment. Fixes PR30947. llvm-svn: 286342
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Craig Topper authored
[AVX-512] Add test cases to demonstrate PR30947. We accidentally use 32 byte aligned store instructions when the original store was only 16 byte aligned if the store is from the lower bits of a subvector extract. llvm-svn: 286341
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Craig Topper authored
Summary: This is needed to make the v64i8 and v32i16 types legal for the 512-bit VBMI instructions. Fixes PR30912. Reviewers: delena, zvi Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26322 llvm-svn: 286339
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Dean Michael Berris authored
llvm-svn: 286330
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Mehdi Amini authored
This reverts commit r286297. Introduces a dependency from libAnalysis to libObject, which I missed during the review. llvm-svn: 286329
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Mehdi Amini authored
The global minimum one is way past this version. llvm-svn: 286328
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Peter Collingbourne authored
The BitcodeReader no longer produces BitcodeDiagnosticInfo diagnostics. The only remaining reference was in the gold plugin; the code there has been dead since we stopped producing InvalidBitcodeSignature error codes in r225562. While at it remove the InvalidBitcodeSignature error code. llvm-svn: 286326
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Dehao Chen authored
Summary: For functions with profile data, we are confident that loop sink will be optimal in sinking code. Reviewers: davidxl, hfinkel Subscribers: mehdi_amini, mzolotukhin, llvm-commits Differential Revision: https://reviews.llvm.org/D26155 llvm-svn: 286325
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Peter Collingbourne authored
Differential Revision: https://reviews.llvm.org/D26430 llvm-svn: 286323
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Dean Michael Berris authored
Summary: This is the initial version of the documentation for how to use XRay as it stands in LLVM, Clang, and compiler-rt. We leave some room for later expansion mentioining what is work in progress and what could be expected moving forward. We also give a high level overview of future work that's both ongoing and planned. Reviewers: echristo, dblaikie, chandlerc Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D26386 llvm-svn: 286319
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Sanjay Patel authored
The smallest tests that expose this are codegen tests (because SelectionDAGBuilder::visitSelect() uses matchSelectPattern to create UMAX/UMIN nodes), but it's also possible to see the effects in IR alone with folds of min/max pairs. If these were written as unsigned compares in IR, InstCombine canonicalizes the unsigned compares to signed compares. Ie, running the optimizer pessimizes the codegen for this case without this patch: define <4 x i32> @umax_vec(<4 x i32> %x) { %cmp = icmp ugt <4 x i32> %x, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> %sel = select <4 x i1> %cmp, <4 x i32> %x, <4 x i32> <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> ret <4 x i32> %sel } $ ./opt umax.ll -S | ./llc -o - -mattr=avx vpmaxud LCPI0_0(%rip), %xmm0, %xmm0 $ ./opt -instcombine umax.ll -S | ./llc -o - -mattr=avx vpxor %xmm1, %xmm1, %xmm1 vpcmpgtd %xmm0, %xmm1, %xmm1 vmovaps LCPI0_0(%rip), %xmm2 ## xmm2 = [2147483647,2147483647,2147483647,2147483647] vblendvps %xmm1, %xmm0, %xmm2, %xmm0 Differential Revision: https://reviews.llvm.org/D26096 llvm-svn: 286318
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Mehdi Amini authored
llvm-svn: 286317
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Greg Clayton authored
Unit tests were added to verify this functionality keeps working correctly. Example output for raw hex bytes: llvm::ArrayRef<uint8_t> Bytes = ...; llvm::outs() << format_hex_bytes(Bytes); 554889e5 4881ec70 04000048 8d051002 00004c8d 05fd0100 004c8b0d d0020000 Example output for raw hex bytes with offsets: llvm::outs() << format_hex_bytes(Bytes, 0x100000d10); 0x0000000100000d10: 554889e5 4881ec70 04000048 8d051002 0x0000000100000d20: 00004c8d 05fd0100 004c8b0d d0020000 Example output for raw hex bytes with ASCII with offsets: llvm::outs() << format_hex_bytes_with_ascii(Bytes, 0x100000d10); 0x0000000100000d10: 554889e5 4881ec70 04000048 8d051002 |UH.?H.?p...H....| 0x0000000100000d20: 00004c8d 05fd0100 004c8b0d d0020000 |..L..?...L..?...| The default groups bytes into 4 byte groups, but this can be changed to 1 byte: llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 16 /*NumPerLine*/, 1 /*ByteGroupSize*/); 0x0000000100000d10: 55 48 89 e5 48 81 ec 70 04 00 00 48 8d 05 10 02 0x0000000100000d20: 00 00 4c 8d 05 fd 01 00 00 4c 8b 0d d0 02 00 00 llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 16 /*NumPerLine*/, 2 /*ByteGroupSize*/); 0x0000000100000d10: 5548 89e5 4881 ec70 0400 0048 8d05 1002 0x0000000100000d20: 0000 4c8d 05fd 0100 004c 8b0d d002 0000 llvm::outs() << format_hex_bytes(Bytes, 0x100000d10, 8 /*NumPerLine*/, 1 /*ByteGroupSize*/); 0x0000000100000d10: 55 48 89 e5 48 81 ec 70 0x0000000100000d18: 04 00 00 48 8d 05 10 02 0x0000000100000d20: 00 00 4c 8d 05 fd 01 00 0x0000000100000d28: 00 4c 8b 0d d0 02 00 00 https://reviews.llvm.org/D26405 llvm-svn: 286316
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Sanjay Patel authored
As the test change shows, we can increase the critical path by adding a 'not' instruction, so make sure that we're actually removing an instruction if we do this transform. This transform could also cause us to miss folds of min/max pairs. llvm-svn: 286315
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Sanjay Patel authored
llvm-svn: 286314
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- Nov 08, 2016
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Zachary Turner authored
llvm-svn: 286305
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Zachary Turner authored
Previously support had been added for using CodeViewRecordIO to read (deserialize) CodeView type records. This patch adds support for writing those same records. With this patch, reading and writing of CodeView type records finally uses a single codepath. Differential Revision: https://reviews.llvm.org/D26253 llvm-svn: 286304
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Adrian Prantl authored
if it is more specific than the one in its DW_AT_specification. If a static member is an array, the translation unit containing the member definition may have a more specific type (including its length) than TUs only seeing the class declaration. This patch adds a DW_AT_type to the member's DW_TAG_variable in addition to the DW_AT_specification in these cases. The member type in the DW_AT_specification still shows the more generic type (without the length) to avoid defeating type uniquing. The DWARF standard discourages “duplicating” a DW_AT_type in a member variable definition but doesn’t explicitly forbid it. Having the more specific type (with the array length) available is what allows the debugger to print the contents of a static array member variable. https://reviews.llvm.org/D26368 rdar://problem/28706946 llvm-svn: 286302
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David L. Jones authored
Summary: There are two variables here that break. This change constrains both of them to debug builds (via DEBUG() or #ifndef NDEBUG). Reviewers: bkramer, t.p.northover Subscribers: mehdi_amini, vkalintiris Differential Revision: https://reviews.llvm.org/D26421 llvm-svn: 286300
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Kostya Serebryany authored
llvm-svn: 286299
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Teresa Johnson authored
Summary: This patch uses the same approach added for inline asm in r285513 to similarly prevent promotion/renaming of locals used or defined in module level asm. All static global values defined in normal IR and used in module level asm should be included on either the llvm.used or llvm.compiler.used global. The former were already being flagged as NoRename in the summary, and I've simply added llvm.compiler.used values to this handling. Module level asm may also contain defs of values. We need to prevent export of any refs to local values defined in module level asm (e.g. a ref in normal IR), since that also requires renaming/promotion of the local. To do that, the summary index builder looks at all values in the module level asm string that are not marked Weak or Global, which is exactly the set of locals that are defined. A summary is created for each of these local defs and flagged as NoRename. This required adding handling to the BitcodeWriter to look at GV declarations to see if they have a summary (rather than skipping them all). Finally, added an assert to IRObjectFile::CollectAsmUndefinedRefs to ensure that an MCAsmParser is available, otherwise the module asm parse would silently fail. Initialized the asm parser in the opt tool for use in testing this fix. Fixes PR30610. Reviewers: mehdi_amini Subscribers: johanengelen, krasin, llvm-commits Differential Revision: https://reviews.llvm.org/D26146 llvm-svn: 286297
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Kuba Brecka authored
This addresses PR30746, <https://llvm.org/bugs/show_bug.cgi?id=30746>. The ASan pass iterates over entry-block instructions and checks each alloca whether it's in NonInstrumentedStaticAllocaVec, which is apparently slow. This patch gathers the instructions to move during visitAllocaInst. Differential Revision: https://reviews.llvm.org/D26380 llvm-svn: 286296
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Andrew Kaylor authored
[BasicAA] Teach BasicAA to handle the inaccessiblememonly and inaccessiblemem_or_argmemonly attributes Differential Revision: https://reviews.llvm.org/D26382 llvm-svn: 286294
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Matthias Braun authored
Fix a bug in the calculation of the changed flag introduced in r285488. llvm-svn: 286293
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Adrian Prantl authored
Thanks to David Blaikie for suggesting this. llvm-svn: 286292
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Sanjoy Das authored
Summary: We've had support for auto upgrading old style scalar TBAA access metadata tags into the "new" struct path aware TBAA metadata for 3 years now. The only way to actually generate old style TBAA was explicitly through the IRBuilder API. I think this is a good time for dropping support for old style scalar TBAA. I'm not removing support for textual or bitcode upgrade -- if you have IR with the old style scalar TBAA tags that go through the AsmParser orf the bitcode parser before LLVM sees them, they will keep working as usual. Note: %val = load i32, i32* %ptr, !tbaa !N !N = < scalar tbaa node > is equivalent to %val = load i32, i32* %ptr, !tbaa !M !N = < scalar tbaa node > !M = !{!N, !N, 0} Reviewers: manmanren, chandlerc, sunfish Subscribers: mcrosier, llvm-commits, mgorny Differential Revision: https://reviews.llvm.org/D26229 llvm-svn: 286291
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Tim Northover authored
After instruction selection we perform some checks on each VReg just before discarding the type information. These checks were assertions before, but that breaks the fallback path so this patch moves the logic into the main flow and reports a better error on failure. llvm-svn: 286289
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Ulrich Weigand authored
This completes assembler / disassembler support for all BFP instructions provided by the floating-point extensions facility. The instructions added here are not currently used for codegen. llvm-svn: 286285
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