Const-correct the FixedLenDecoderEmitter. Pass a few things by const reference instead of value to avoid some copying.

llvm-svn: 152899

analysis implementation. The header was already separated. Also cleanup
all the comments in the header to follow a nice modern doxygen form.

There is still plenty of cruft here, but some of that will fall out in
subsequent refactorings and this was an easy step in the right
direction. No functionality changed here.

llvm-svn: 152898

These edges are not really necessary, but it is consistent with the
way we currently create physreg edges. Scheduler heuristics that
expect a DAG edge to the block terminator could benefit from this
change. Although in the future I hope we have a better mechanism for
modeling latency across scheduling regions.

llvm-svn: 152895

Only record IVUsers that are dominated by simplified loop
headers. Otherwise SCEVExpander will crash while looking for a
preheader.

I previously tried to work around this in LSR itself, but that was
insufficient. This way, LSR can continue to run if some uses are not
in simple loops, as long as we don't attempt to analyze those users.

Fixes <rdar://problem/11049788> Segmentation fault: 11 in LoopStrengthReduce

llvm-svn: 152892

Spacing fixes. Mostly aligning arguments that spilled onto next line with the opening parenthese instead of 2 spaces in.

llvm-svn: 152889

on our internal nightly testers.  So, basically revert r152486 again.

Abbreviated original commit message:
Implement a more intelligent way of spilling uses across an invoke boundary.

It looks as if Chander's inlining work, r152737, exposed an issue.

llvm-svn: 152887

Remove unused field NumVariable from Filter class. Even it was needed the same result could be found with VariableInstructions.size(). Also fix some typos in comments.

llvm-svn: 152885

In InstCombiner::visitOr, make sure we reverse the operand swap used for checking for or-of-xor operations after those checks; a later check expects that any constant will be in Op1.  PR12234.

llvm-svn: 152884

rdar://11058464

llvm-svn: 152883

rdar://11058464

llvm-svn: 152881

Patch by Clemens Hammacher!

Fixes PR12243

llvm-svn: 152880

Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." for workaround of g++-4.4's miscompilation.

It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.

llvm-svn: 152877

the DECL information.

rdar://10855921

llvm-svn: 152876

llvm-svn: 152870

and still allow immediate encoding, just not with cmn.
rdar://11038907

llvm-svn: 152869

the test-suite.

llvm-svn: 152860

rdar://11038907

llvm-svn: 152847

rdar://11056591

llvm-svn: 152846

Part of rdar://8905263

llvm-svn: 152845

llvm-svn: 152844

llvm-svn: 152843

llvm-svn: 152842

llvm-svn: 152841

llvm-svn: 152840

rdar://11056647

llvm-svn: 152834

We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.

llvm-svn: 152833

llvm-svn: 152832

theoretical fix since it only matters for types with >= 2^63 bits (!) and also
only matters if pointers have more than 64 bits, which is not supported anyway.

llvm-svn: 152831

register allocation by allowing all 32 D-registers to be used. Patch by Cameron
Zwarich.

llvm-svn: 152824

We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

llvm-svn: 152817

This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.

If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.

llvm-svn: 152816

Fix VCVT decoding (between floating-point and fixed-point, Floating-point).  Patch by Richard Barton.

llvm-svn: 152814

llvm-svn: 152812

code.
While here, reduce indentation.

llvm-svn: 152803

llvm-svn: 152794

This needs a test, but it will take some time to figure
out the best way to get an input that will produce > 2^16 relocs.

Patch by Graydon Hoare!

llvm-svn: 152787

When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.

llvm-svn: 152784

out the DW_AT_name. Older gdbs unfortunately still use it to
disambiguate member functions in templated classes (gdb.cp/templates.exp).

rdar://11043421 (which is now deferred for a bit)

llvm-svn: 152782

llvm-svn: 152780

Transform:

        (fsub x, (fadd x, y)) -> (fneg y) and
        (fsub x, (fadd y, x)) -> (fneg y)

if 'unsafe math' is specified.
<rdar://problem/7540295>

llvm-svn: 152777