Commits · a25ad0685ab8ea270c44df06abe4d6ac081cdaae · Lorenzo Albano / LLVM bpEVL · GitLab

Oct 20, 2015
- Mips: Remove implicit ilist iterator conversions, NFC · 7869148c
  Duncan P. N. Exon Smith authored Oct 20, 2015
  7869148c
- CppBackend: Remove implicit ilist iterator conversions, NFC · 19d95187
  Duncan P. N. Exon Smith authored Oct 20, 2015
  19d95187
- BPF: Remove implicit ilist iterator conversion, NFC · d95fa4cc
  Duncan P. N. Exon Smith authored Oct 20, 2015
  d95fa4cc
- ARM: Remove implicit ilist iterator conversions, NFC · 9f9559e8
  Duncan P. N. Exon Smith authored Oct 19, 2015
  9f9559e8
Oct 19, 2015
- X86: Remove implicit ilist iterator conversions, NFC · d77de649
  Duncan P. N. Exon Smith authored Oct 19, 2015
  d77de649
- [Hexagon] Remove unnecessary argument sign extends · 055c5fd7
  Krzysztof Parzyszek authored Oct 19, 2015
  055c5fd7
- Add missing override noticed by Clang's -Winconsistent-missing-override. · 755e5029
  Benjamin Kramer authored Oct 19, 2015
  755e5029
- [AArch64]Merge halfword loads into a 32-bit load · d3548303
  Jun Bum Lim authored Oct 19, 2015
  d3548303
- [Hexagon] Fix debug information for local objects · 23920ec9
  Krzysztof Parzyszek authored Oct 19, 2015
  23920ec9
- [Hexagon] Delay emission of CFI instructions · db867706
  Krzysztof Parzyszek authored Oct 19, 2015
  db867706
- Remove CRLF newlines. NFC. · 33533232
  Benjamin Kramer authored Oct 19, 2015
  33533232
- Fix mapping of @llvm.arm.ssat/usat intrinsics to ssat/usat instructions · 1040a53b
  Asiri Rathnayake authored Oct 19, 2015
  1040a53b
- Removed parameter "Consecutive" from isLegalMaskedLoad() / isLegalMaskedStore(). · 20662e39
  Elena Demikhovsky authored Oct 19, 2015
  20662e39
- [mips][microMIPS] Implement ADDQ.PH, ADDQ_S.W, ADDQH.PH, ADDQH.W, ADDSC,... · 52920835
  Zlatko Buljan authored Oct 19, 2015
  52920835
- [mips][microMIPS] Implement ABSQ.QB, ABSQ_S.PH, ABSQ_S.W, ABSQ_S.QB, INSV,... · d0a7d6e4
  Zlatko Buljan authored Oct 19, 2015
  d0a7d6e4
Oct 18, 2015
- [X86][AVX512DQ] add scalar fpclass · 696e8e0b
  Asaf Badouh authored Oct 18, 2015
  696e8e0b
- AVX512: Lowering i8/i16 vector CTLZ using the dword LZCNT vector instruction · cbb95505
  Igor Breger authored Oct 18, 2015
  cbb95505
- [Sparc] Use MCPhysReg instead of unsigned to size static arrays of registers.... · 92cfdd70
  Craig Topper authored Oct 18, 2015
  92cfdd70
- Make a bunch of static arrays const. · 2626094f
  Craig Topper authored Oct 18, 2015
  2626094f
Oct 17, 2015
- Use std::find instead of manual loop. · ec15ea12
  Craig Topper authored Oct 17, 2015
  ec15ea12
- Use std::is_sorted to replace a custom version. Also replace a comparison... · a8334511
  Craig Topper authored Oct 17, 2015
  a8334511
- [X86][XOP] Add VPROT instruction opcodes · 86c5e85e
  Simon Pilgrim authored Oct 17, 2015
  86c5e85e
- Remove unnecessary 'const' pointed out by David Blaikie. · a2d06350
  Craig Topper authored Oct 17, 2015
  a2d06350
- Replace a custom table sort check with std::is_sorted. Change a function to... · 9ff9bf49
  Craig Topper authored Oct 17, 2015
  9ff9bf49
- Use std::begin/end and std::is_sorted to simplify some code. NFC · c177d9ed
  Craig Topper authored Oct 17, 2015
  c177d9ed
- [CostModel] Fixed AVX integer shift costs · a18ae9bd
  Simon Pilgrim authored Oct 17, 2015
  a18ae9bd
- [X86][FastISel] Teach how to select SSE4A nontemporal stores. · 5b65f28f
  Simon Pilgrim authored Oct 17, 2015
  5b65f28f
- [Hexagon] Adding skeleton of HVX extension instructions. · 7c958713
  Colin LeMahieu authored Oct 17, 2015
  7c958713
- WebAssembly: don't omit dead vregs from locals · 3428ed4f
  JF Bastien authored Oct 17, 2015
  3428ed4f
- WebAssembly: fix the syntax for comparisons · 4f43e80e
  JF Bastien authored Oct 17, 2015
  4f43e80e
- [WinEH] Fix stack alignment in funclets and ParentFrameOffset calculation · 28e49034
  Reid Kleckner authored Oct 16, 2015
  28e49034
- [x86] promote 'add nsw' to a wider type to allow more combines · bbd52449
  Sanjay Patel authored Oct 16, 2015
  bbd52449
Oct 16, 2015
- Fix assertion failure with fp128 to unsigned i64 conversion · 09b39acc
  Andrew Kaylor authored Oct 16, 2015
  09b39acc
- [Hexagon] Split double registers · a7c5f040
  Krzysztof Parzyszek authored Oct 16, 2015
  a7c5f040
- [Hexagon] Delete lib/Target/Hexagon/HexagonRemoveSZExtArgs.cpp · aec39c68
  Krzysztof Parzyszek authored Oct 16, 2015
  aec39c68
- [Hexagon] Merge adjacent stores · 5b7dd0cd
  Krzysztof Parzyszek authored Oct 16, 2015
  5b7dd0cd
- WebAssembly: fix load/store syntax · 6126d2b8
  JF Bastien authored Oct 16, 2015
  6126d2b8
- WebAssembly: relooper analysis pass · 53bd9750
  JF Bastien authored Oct 16, 2015
  53bd9750
- [AArch64] Implement vector splitting on UADDV. · 434d4599
  Charlie Turner authored Oct 16, 2015
  434d4599
- [mips][microMIPS] Implement LB, LBE, LBU and LBUE instructions · 3c88fbd3
  Hrvoje Varga authored Oct 16, 2015
  3c88fbd3