Commits · a5bc99f1647883c7afca36f26ab63f108940723e · Lorenzo Albano / LLVM bpEVL · GitLab

Nov 12, 2013
- [mips][msa] Added support for matching bset, bseti, bneg, and bnegi from... · a5bc99f1
  Daniel Sanders authored Nov 12, 2013
  a5bc99f1
- XCore target: fix bug in aligning 'byval i8*' on the stack · 494591b8
  Robert Lytton authored Nov 12, 2013
  494591b8
- Add XCore support for ATOMIC_FENCE. · 61d9149c
  Robert Lytton authored Nov 12, 2013
  61d9149c
- XCore target: return error for unsupported alignment · ed835b6f
  Robert Lytton authored Nov 12, 2013
  ed835b6f
- R600/SI: Change formatting of printed registers. · 72b31eee
  Matt Arsenault authored Nov 12, 2013
  72b31eee
- Change the default branch instruction to be the 16 bit variety for mips16. · f0e6968e
  Reed Kotler authored Nov 12, 2013
  f0e6968e
- Lower X86::MORESTACK_RET and X86::MORESTACK_RET_RESTORE_R10 in · c2b77235
  Lang Hames authored Nov 11, 2013
  c2b77235
Nov 11, 2013
- Fix the recently added anyregcc convention to handle spilled operands. · a28099fd
  Andrew Trick authored Nov 11, 2013
  a28099fd
- R600: Use function inputs to represent data stored in gpr · f143af3f
  Vincent Lejeune authored Nov 11, 2013
  f143af3f
- [mips] Partially revert r193641. Stack alignment should not be determined by · 8f1caeb0
  Akira Hatanaka authored Nov 11, 2013
  8f1caeb0
- [ARM] Add support for MVFR2 which is new in ARMv8 · eff45103
  Artyom Skrobov authored Nov 11, 2013
  eff45103
- [NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters · 124e93de
  Justin Holewinski authored Nov 11, 2013
  124e93de
- [NVPTX] Fix logic error in loading vector parameters of more than 4 components · 4f5bc9b3
  Justin Holewinski authored Nov 11, 2013
  4f5bc9b3
- [AArch64] The shift right/left and insert immediate builtins expect 3 · d3684a05
  Chad Rosier authored Nov 11, 2013
  d3684a05
- [AArch64] Add support for NEON scalar floating-point convert to fixed-point instructions. · 35575e73
  Chad Rosier authored Nov 11, 2013
  35575e73
- Add PPC option for full register names in asm · c6a24398
  Hal Finkel authored Nov 11, 2013
  c6a24398
- [NVPTX] Blacklist TailDuplicate pass · eeb109a4
  Justin Holewinski authored Nov 11, 2013
  eeb109a4
- AArch64: refactor vector list creation to be more uniform · ef276df2
  Tim Northover authored Nov 11, 2013
  ef276df2
Nov 10, 2013
- Make method static · c9ad7c9f
  Matt Arsenault authored Nov 10, 2013
  c9ad7c9f
- Fix missing C++ mode comment · d82c183d
  Matt Arsenault authored Nov 10, 2013
  d82c183d
- Mostly finish up constant islands port for Mips for load constants. · 45c5927c
  Reed Kotler authored Nov 10, 2013
  45c5927c
Nov 09, 2013
- Remove some unnecessary temporary strings. · 3e9237a3
  Benjamin Kramer authored Nov 09, 2013
  3e9237a3
- [arm] Refine ARMBuildAttrs.h. · a2630db1
  Logan Chien authored Nov 09, 2013
  a2630db1
- [mips] Make sure there is a chain edge dependency between loads that read · d1c58ed8
  Akira Hatanaka authored Nov 09, 2013
  d1c58ed8
- [Stackmap] Materialize the jump address within the patchpoint noop slide. · 87ed906b
  Juergen Ributzka authored Nov 09, 2013
  87ed906b
- [Stackmap] Add AnyReg calling convention support for patchpoint intrinsic. · 9969d3e6
  Juergen Ributzka authored Nov 08, 2013
  9969d3e6
Nov 08, 2013
- X86: Assembly files with .cfi_cfa_def shouldn't hit llvm_unreachable() · 2fca51d3
  Jim Grosbach authored Nov 08, 2013
  2fca51d3
- Make PrintAsmOperand call to the superclass to handle 'n' and 'c' operand modifiers. · 5f54c655
  Richard Barton authored Nov 08, 2013
  5f54c655
- ARM: fold prologue/epilogue sp updates into push/pop for code size · 93bcc66e
  Tim Northover authored Nov 08, 2013
  93bcc66e
- [ARM] Handling for coprocessor instructions that are undefined starting from... · 202ff08f
  Artyom Skrobov authored Nov 08, 2013
  202ff08f
- [ARM] Handling for coprocessor instructions that are undefined starting from ARMv8 (ARM encodings) · e686cec7
  Artyom Skrobov authored Nov 08, 2013
  e686cec7
- [mips][msa] Update encoding of LDI instruction. · a3bac169
  Matheus Almeida authored Nov 08, 2013
  a3bac169
- [ARM] In ARMAsmParser, MatchCoprocessorOperandName() permitted p10 and p11 as... · 86534439
  Artyom Skrobov authored Nov 08, 2013
  86534439
Nov 07, 2013
- Support for microMIPS trap instructions 1. · c18b6d10
  Zoran Jovanovic authored Nov 07, 2013
  c18b6d10
- Disable some code that is causing some warnings. It's in the process · e7af1ec9
  Reed Kotler authored Nov 07, 2013
  e7af1ec9
Nov 06, 2013
- R600: Fix LowerUDIVREM · 4f3751f2
  Vincent Lejeune authored Nov 06, 2013
  4f3751f2
- [AArch64] Remove NEON from "generic" CPU target. · 5e45b5f1
  Amara Emerson authored Nov 06, 2013
  5e45b5f1
- [SystemZ] Handle vectors in getSetCCResultType · abc010bf
  Richard Sandiford authored Nov 06, 2013
  abc010bf
- Implement gpword directive for mips, test case added. Stype changes using... · 4c29985c
  Vladimir Medic authored Nov 06, 2013
  4c29985c
- [llvm-c] Improve TargetMachine bindings · 7b61b75c
  Peter Zotov authored Nov 06, 2013
  7b61b75c