llvm-svn: 110460

llvm-svn: 110458

llvm-svn: 110457

llvm-svn: 110456

llvm-svn: 110455

llvm-svn: 110454

llvm-svn: 110453

When a physical register is in use, some alias of that register has a live
interval with a relevant live range. That is the sad state of intervals after
physreg coalescing of subregs, and it is good enough for correct register
allocation.

llvm-svn: 110452

Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

llvm-svn: 110446

Also move 'default' case next to a real case to help compiler optimize in
non-Debug builds.
No functionality change.

llvm-svn: 110435

Further clean up the comparison function by removing overly generalized
"domains".
Remove all understanding of ELF aliases and simplify folding code and comments.

llvm-svn: 110434

llvm-svn: 110429

While at it, fix all other HTML validation errors in docs/Passes.html.

llvm-svn: 110428

llvm-svn: 110427

llvm-svn: 110426

llvm-svn: 110425

need the Compare flag after all.

--- Reverse-merging r109901 into '.':
U    include/llvm/Target/TargetInstrDesc.h
U    include/llvm/Target/Target.td
U    utils/TableGen/InstrInfoEmitter.cpp
U    utils/TableGen/CodeGenInstruction.cpp
U    utils/TableGen/CodeGenInstruction.h

llvm-svn: 110424

This pass tries to remove comparison instructions when possible. For instance,
if you have this code:

   sub r1, 1
   cmp r1, 0
   bz  L1

and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.

llvm-svn: 110423

llvm-svn: 110422

AliasAnalysis base class and into BasicAliasAnalyais. This avoids confusion
about where such logic is happening when there are other AliasAnalysis
implementations present.

Move the logic for translating two-callsite getModRefInfo queries into
other AliasAnalysis queries out of BasicAliasAnalysis and into the
AliasAnalysis base class, as it is useful for other AliasAnalysis
implementations.

llvm-svn: 110421

llvm-svn: 110419

llvm-svn: 110416

While emitting DBG_VALUE for registers spilled at the end of a block do not use location of MBB->end(). If a block does not have terminator then incoming iterator points to end().

llvm-svn: 110411

llvm-svn: 110410

llvm-svn: 110407

llvm-svn: 110404

When a joined COPY changes subreg liveness, we keep it around as a KILL,
otherwise it is safe to delete.

llvm-svn: 110403

LiveVariables becomes horribly wrong while the coalescer is running, but the
analysis is not zapped until after the coalescer pass has run. This causes tons
of false reports when calling verify form the coalescer.

llvm-svn: 110402

llvm-svn: 110401

llvm-svn: 110398

ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396

to IntrReadWriteArgMem, as it's for reading as well as writing.

llvm-svn: 110395

Support very basic (doesn't include ABI support in the front-end, varags, ...) 256-bit argument passing and return for AVX

llvm-svn: 110394

of BasicAA::getModRefInfo. This allows BasicAA to say that two
memset calls to non-aliasing memory locations don't interfere.

llvm-svn: 110393

llvm-svn: 110391

llvm-svn: 110388

llvm-svn: 110387

We verify that the LiveInterval is live at uses and defs, and that all
instructions have a SlotIndex.

Stuff we don't check yet:

- Is the LiveInterval minimal?
- Do all defs correspond to instructions or phis?
- Do all defs dominate all their live ranges?
- Are all live ranges continually reachable from their def?

llvm-svn: 110386

llvm-svn: 110385

llvm-svn: 110384