llvm-svn: 31223

llvm-svn: 31222

llvm-svn: 31221

llvm-svn: 31220

llvm-svn: 31219

llvm-svn: 31218

llvm-svn: 31215

llvm-svn: 31214

llvm-svn: 31210

llvm-svn: 31209

llvm-svn: 31207

llvm-svn: 31206

   InsertNewInstBefore(new CastInst(Val, ValTy, Val->GetName()), I)
into:
   InsertCastBefore(Val, ValTy, I)

llvm-svn: 31204

llvm-svn: 31203

llvm-svn: 31201

llvm-svn: 31200

vector of FP types.

llvm-svn: 31198

llvm-svn: 31197

llvm-svn: 31196

Make necessary changes to support DIV -> [SUF]Div. This changes llvm to
have three division instructions: signed, unsigned, floating point. The
bytecode and assembler are bacwards compatible, however.

llvm-svn: 31195

produce an EQ property.

llvm-svn: 31193

llvm-svn: 31191

Fix and comment the "or", "and" and "xor" transformations.

llvm-svn: 31189

llvm-svn: 31188

to match MOVL (movss, movsd, etc.). Don't forget to commute it back and try
unpck* and shufp* if that doesn't pan out.

llvm-svn: 31186

llvm-svn: 31185

llvm-svn: 31184

llvm-svn: 31183

llvm-svn: 31180

llvm-svn: 31179

llvm-svn: 31171

llvm-svn: 31170

bison'ing correctly.

llvm-svn: 31169

visitBr to just call visitSwitchCase, eliminating duplicate logic.

llvm-svn: 31167

Rename LHSBB/RHSBB to TrueBB/FalseBB.  Allow the RHS value to be null,
in which case the LHS is treated as a bool.

llvm-svn: 31166

isel changes happened months ago.

llvm-svn: 31164

llvm-svn: 31162

llvm-svn: 31161

llvm-svn: 31160

llvm-svn: 31159