Commits · b1e68f885b550cf006f5d84b43aa3a0b2905d4b3 · Lorenzo Albano / LLVM bpEVL · GitLab

Sep 09, 2020
- [SelectionDAGBuilder] Pass fast math flags to getNode calls rather than trying... · b1e68f88
  Craig Topper authored Sep 08, 2020
  b1e68f88
Sep 08, 2020
- GlobalISel: Combine `op undef, x` to 0 · 1242dd33
  Volkan Keles authored Sep 08, 2020
  1242dd33
- [AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long · 8ee1419a
  Simon Wallis authored Sep 08, 2020
  8ee1419a
Sep 07, 2020
- [DAGCombiner] allow more store merging for non-i8 truncated ops · 7a06b166
  Sanjay Patel authored Sep 07, 2020
  7a06b166
- [GlobalISel] Extend not_cmp_fold to work on conditional expressions · 713c2ad6
  Jay Foad authored Aug 27, 2020
  713c2ad6
Sep 04, 2020
- [AArch64][SVE] Add lowering for rounding operations · 1ffcbe35
  Muhammad Asif Manzoor authored Sep 04, 2020
  1ffcbe35
- [SVE][CodeGen] Fix up warnings in sve-split-insert/extract tests · 73a3d350
  David Sherwood authored Aug 21, 2020
  73a3d350
Sep 02, 2020
- [SVE] Don't reorder subvector/binop sequences when the resulting binop is not legal. · f7212125
  Paul Walker authored Aug 21, 2020
  f7212125
- [AArch64][SVE] Preserve full vector regs over EH edge. · f13beac5
  Sander de Smalen authored Sep 02, 2020
  f13beac5
Sep 01, 2020
- Revert "Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) ->... · 520ab710
  Amara Emerson authored Sep 01, 2020
  520ab710
- Revert "[GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _)"... · 8693ddc7
  Jordan Rupprecht authored Sep 01, 2020
  8693ddc7
- Revert "Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain"" · 5987da87
  Owen Anderson authored Sep 01, 2020
  5987da87
- [AArch64][GlobalISel] Optimize away a Not feeding a brcond by using tbz instead of tbnz. · 5ded4442
  Amara Emerson authored Aug 22, 2020
  5ded4442
- [GlobalISel] Fold xor(cmp(pred, _, _), 1) -> cmp(inverse(pred), _, _) · 8ad8f484
  Amara Emerson authored Aug 21, 2020
  8ad8f484
- GlobalISel: Add combines for extend operations · 061182b7
  Volkan Keles authored Sep 01, 2020
  061182b7
- Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain" · bc9a29b9
  Paul Walker authored Sep 01, 2020
  bc9a29b9
- [SVE][CodeGen] Fix TypeSize/ElementCount related warnings in sve-split-load.ll · 9fbb1132
  David Sherwood authored Aug 26, 2020
  9fbb1132
Aug 31, 2020
- [DAGCombiner] skip reciprocal divisor optimization for x/sqrt(x), better · 1c9a09f4
  Sanjay Patel authored Aug 31, 2020
  1c9a09f4
- [AArch64] add another test for reciprocal sqrt; NFC · 11e0c5b6
  Sanjay Patel authored Aug 31, 2020
  
  11e0c5b6
Aug 30, 2020
- [DAGCombiner] skip reciprocal divisor optimization for x/sqrt(x) · 716e35a0
  Sanjay Patel authored Aug 30, 2020
  716e35a0
- [AArch64] add tests for multi-use fast sqrt/recip; NFC · 7692cb1a
  Sanjay Patel authored Aug 30, 2020
  
  7692cb1a
Aug 29, 2020
- [AArch64] Generate and parse SEH assembly directives · 5b86d130
  Martin Storsjö authored Aug 07, 2020
  5b86d130
- [DAGCombiner] Enhance (zext(setcc)) · b9043247
  Kai Luo authored Aug 29, 2020
  b9043247
Aug 28, 2020
- [AArch64][CodeGen] Restrict bfloat vector operations to what's actually supported · d678e14c
  Ties Stuij authored Aug 28, 2020
  d678e14c
Aug 27, 2020
- AArch64/GlobalISel: Fix missing function begin marker in test · 0034e00d
  Matt Arsenault authored Aug 27, 2020
  
  0034e00d
- GlobalISel: Remove leftover lit.local.cfg · 9607ccf6
  Matt Arsenault authored Aug 27, 2020
  9607ccf6
- [ARM][BFloat16] Change types of some Arm and AArch64 bf16 intrinsics · ae1396c7
  Mikhail Maltsev authored Aug 27, 2020
  ae1396c7
- Reapply D70800: Fix AArch64 AAPCS frame record chain · e9d9a612
  Owen Anderson authored Aug 26, 2020
  e9d9a612
- [GISel] Add new GISel combiners for G_SELECT · db464a3d
  Aditya Nandakumar authored Aug 27, 2020
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- [AArch64] Optimize instruction selection for certain vector shuffles · 23d5e93f
  Mikhail Maltsev authored Aug 27, 2020
  23d5e93f
- [SVE] Fallback to default expansion when lowering SIGN_EXTEN_INREG from non-byte based source. · 81337c91
  Paul Walker authored Aug 22, 2020
  81337c91
- Revert "Reapply D70800: Fix AArch64 AAPCS frame record chain" · 04879086
  Martin Storsjö authored Aug 27, 2020
  04879086
- GlobalISel: Add generic instructions for memory intrinsics · 0b7f6cc7
  Matt Arsenault authored Aug 03, 2020
  0b7f6cc7
Aug 26, 2020
- [AArch64][SVE] Add lowering for llvm fceil · fd536eee
  Muhammad Asif Manzoor authored Aug 26, 2020
  fd536eee
- Reapply D70800: Fix AArch64 AAPCS frame record chain · 99364552
  Owen Anderson authored Aug 26, 2020
  99364552
- [DAGCombiner] allow store merging non-i8 truncated ops · 54a5dd48
  Sanjay Patel authored Aug 26, 2020
  54a5dd48
- [Scheduling] Implement a new way to cluster loads/stores · ebf3b188
  QingShan Zhang authored Aug 26, 2020
  ebf3b188
- [AArch64][SVE] Fix calculation restore point for SVE callee saves. · 5f47d445
  Sander de Smalen authored Aug 19, 2020
  5f47d445
- [llvm-readobj] Fix arm64 unwind opcode disassembly printing · db259fe3
  Martin Storsjö authored Aug 24, 2020
  db259fe3
Aug 25, 2020
- AArch64: Fix hardcoded register in test · 1b3de881
  Matt Arsenault authored Jun 03, 2020
  
  1b3de881