Commits · b3bb5c3efc971f595a08446f3e58c0fd4162c26d · Lorenzo Albano / LLVM bpEVL · GitLab

Feb 04, 2021
- [AMDGPU][GlobalISel] Use scalar min/max instructions · b3bb5c3e
  Jay Foad authored Feb 04, 2021
  b3bb5c3e
- [X86] Use VT::changeVectorElementType helper where possible. NFCI. · 31b85e1c
  Simon Pilgrim authored Feb 04, 2021
  
  31b85e1c
- NFC: Migrate LoopUnrollPass to work on InstructionCost · 75b2555d
  Sander de Smalen authored Feb 04, 2021
  75b2555d
- [ConstraintElimination] Support conditions from loop preheaders · 703f6a68
  Florian Hahn authored Feb 03, 2021
  703f6a68
- AMDGPU: Add support for amdgpu-unsafe-fp-atomics attribute · 6054a456
  Konstantin Zhuravlyov authored Feb 04, 2021
  6054a456
- [AVR] Remove an assertion that causes generic CodeGen tests to fail · 83e2710e
  Dylan McKay authored Feb 05, 2021
  83e2710e
- [X86] Remove stale TODO comment. NFC. · fa2cdb81
  Simon Pilgrim authored Feb 04, 2021
  fa2cdb81
- Re-land D94976 after revert in e29552c5 · 8998f584
  Jeremy Morse authored Feb 04, 2021
  8998f584
- [ARM] Handle f16 in GeneratePerfectShuffle · 649a3d00
  David Green authored Feb 04, 2021
  649a3d00
- [clang][cli] Command line round-trip for HeaderSearch options · 225ccf0c
  Jan Svoboda authored Feb 04, 2021
  225ccf0c
- [Support] Indent multi-line descr of enum cli options. · e3f02302
  Joachim Meyer authored Dec 17, 2020
  e3f02302
- [AMDGPU] Save all lanes for reserved VGPRs · 6c59dc47
  Sebastian Neubauer authored Feb 04, 2021
  6c59dc47
- [NFC][Coroutine] Remove redundant comment · 9511fa2d
  Chuanqi Xu authored Feb 04, 2021
  9511fa2d
- [Transforms/IPO] Use range-based for loops (NFC) · be374758
  Kazu Hirata authored Feb 03, 2021
  
  be374758
- [Support] Drop unnecessary const from return types (NFC) · b4de30f6
  Kazu Hirata authored Feb 03, 2021
  b4de30f6
- [OpenMPIRBuilder] Implement collapseLoops. · 26b5be66
  Michael Kruse authored Feb 03, 2021
  26b5be66
- [AArch64][GlobalISel] Change store value type from p0 -> s64 to import patterns · 56fcd4ea
  Jessica Paquette authored Feb 02, 2021
  56fcd4ea
- Revert "[InstrProfiling] Use !associated metadata for counters, data and values" · b9953141
  Nico Weber authored Feb 03, 2021
  b9953141
- [AArch64][GlobalISel] Emit G_ASSERT_ZEXT in assignValueToAddress for ZExt params · a1f6bb20
  Jessica Paquette authored Jan 29, 2021
  a1f6bb20
Feb 03, 2021
- Revert "[LTO] Use lto::backend for code generation." · 7db390cc
  Florian Hahn authored Feb 03, 2021
  7db390cc
- Revert "[LTO] Add option enable NewPM with LTOCodeGenerator." · 0a17664b
  Florian Hahn authored Feb 03, 2021
  0a17664b
- Revert "[LTOCodeGenerator] Use lto::Config for options (NFC)." · b0a8e41c
  Florian Hahn authored Feb 03, 2021
  b0a8e41c
- [NewPM][HelloWorld] Move HelloWorld to Utils · f0205446
  Arthur Eubanks authored Feb 02, 2021
  f0205446
- [Hexagon] Add LLVM instruction definitions for Hexagon V68 · 0bb19851
  Krzysztof Parzyszek authored Feb 03, 2021
  
  0bb19851
- [SampleFDO][NFC] Detach SampleProfileLoader from SampleCoverageTracker · b8f13db5
  Rong Xu authored Feb 03, 2021
  b8f13db5
- [GlobalISel] Combine narrowScalar of G_ADD and G_SUB. NFC · 62ce4b04
  Justin Bogner authored Feb 02, 2021
  62ce4b04
- RegisterCoalescer: Fix not setting undef on coalesced subregister uses · 39fbb5c3
  Matt Arsenault authored Dec 11, 2020
  39fbb5c3
- RegisterCoalescer: Prune undef subranges from copy pairs in loops · d886da04
  Matt Arsenault authored Nov 16, 2020
  d886da04
- Revert "AMDGPU: Don't consider global pressure when bundling soft clauses" · 477e3fe4
  Matt Arsenault authored Feb 03, 2021
  477e3fe4
- [DAGCombiner] Remove (sra (shl X, C), C) if X has more than C sign bits. · 34da12dd
  Craig Topper authored Feb 03, 2021
  34da12dd
- Revert "[DWARF] Location-less inlined variables should not have DW_TAG_variable" · d32deaab
  Jeremy Morse authored Feb 03, 2021
  d32deaab
- [VPlan] Manage induction value creation using VPValues. · daaa0e35
  Florian Hahn authored Feb 03, 2021
  daaa0e35
- [DWARF] Location-less inlined variables should not have DW_TAG_variable · ddc2f1e3
  Jeremy Morse authored Feb 03, 2021
  ddc2f1e3
- [AMDGPU] Fix multiclass template parameter types. NFC. · 26ec7853
  Jay Foad authored Feb 03, 2021
  26ec7853
- Revert "[ConstantFold] Fold more operations to poison" · 06829034
  Juneyoung Lee authored Feb 04, 2021
  06829034
- AMDGPU: Move handling of allocation of fixed ABI inputs · 9719f170
  Matt Arsenault authored Jan 09, 2021
  9719f170
- [X86][SSE] Support variable-index float/double vector insertion on SSE41+ targets (PR47924) · 32b7c2fa
  Simon Pilgrim authored Feb 03, 2021
  32b7c2fa
- Revert "[AMDGPU] Add a new Clamp Pattern to the GlobalISel Path." · d49efdc9
  Sebastian Neubauer authored Feb 03, 2021
  d49efdc9
- [AArch64][SVE]Add cost model for broadcast shuffle · 2cbcf3e2
  Caroline Concatto authored Jan 28, 2021
  2cbcf3e2
- [VPlan][NFC] Introduce constructors for VPIteration · d4626eb0
  David Sherwood authored Jan 29, 2021
  d4626eb0