Commits · b4fb256574f48ec3c4ca2a00e4b4886890307d66 · Lorenzo Albano / LLVM bpEVL · GitLab

Jun 30, 2017
- Make 0 argument getSubtargetImpl functions for the X86, AArch64, and PPC... · b4fb2565
  Eric Christopher authored Jun 30, 2017
  b4fb2565
- [X86][SSE] Pulled common variables to top of matchUnaryPermuteVectorShuffle. NFCI. · 724990ab
  Simon Pilgrim authored Jun 30, 2017
  724990ab
- [MIPS] Handle PIC load address macro instructions in N64. · da96c436
  Simon Dardis authored Jun 30, 2017
  da96c436
- [SystemZ] Add missing high-word facility instructions · 9932f928
  Ulrich Weigand authored Jun 30, 2017
  9932f928
- fix trivial typos, NFC · a89d4b5f
  Hiroshi Inoue authored Jun 30, 2017
  a89d4b5f
- [GlobalISel] Make multi-step legalization work. · b539ea53
  Kristof Beyls authored Jun 30, 2017
  b539ea53
- fix trivial typo; NFC · c3969644
  Hiroshi Inoue authored Jun 30, 2017
  c3969644
- [WebAssembly] Add support for exception handling instructions · ac62b05d
  Heejin Ahn authored Jun 30, 2017
  ac62b05d
- Unified logic for computing target ABI in backend and front end by moving this... · ee837a59
  Eric Christopher authored Jun 30, 2017
  ee837a59
- To help readability of mightUseCTR pull out the inline asm handling support into a function. · 56f481b7
  Eric Christopher authored Jun 29, 2017
  56f481b7
- Make the PPCCTRLoops pass depend on being able to access the TargetMachine and... · b16eacf5
  Eric Christopher authored Jun 29, 2017
  b16eacf5
Jun 29, 2017
- Revert "[mips] Fix multiprecision arithmetic." · dede76f4
  Simon Dardis authored Jun 29, 2017
  dede76f4
- [AArch64] Silence an unused variable warning in Release builds. NFC. · 4c1bc656
  Chad Rosier authored Jun 29, 2017
  4c1bc656
- [Hexagon] Keep all phi nodes when building DFG in addr-mode-opt · 00894194
  Krzysztof Parzyszek authored Jun 29, 2017
  00894194
- [llvm-objdump] Handle invalid instruction gracefully on ARM · 6269d39f
  Eugene Leviant authored Jun 29, 2017
  6269d39f
- bpf: remove unnecessary truncate operation · 5fbe01b1
  Yonghong Song authored Jun 29, 2017
  5fbe01b1
- [PowerPC] fix potential verification error on __tls_get_addr · 6989caa9
  Hiroshi Inoue authored Jun 29, 2017
  6989caa9
- Revert "r306529 - [X86] Correct dwarf unwind information in function epilogue" · 559aa753
  Daniel Jasper authored Jun 29, 2017
  559aa753
- [TargetTransformInfo, API] Add a list of operands to TTI::getUserCost · 70ed78e5
  Evgeny Astigeevich authored Jun 29, 2017
  70ed78e5
- [GlobalISel][X86] Support vector type G_MERGE_VALUES selection. · 0cddd348
  Igor Breger authored Jun 29, 2017
  0cddd348
- [LLVM][X86][Goldmont] Adding new target-cpu: Goldmont · 4bcb9c33
  Michael Zuckerman authored Jun 29, 2017
  4bcb9c33
- [ARM] Add tGPRwithpc register class and use it for TBB/THH · 08fdd040
  Florian Hahn authored Jun 29, 2017
  08fdd040
Jun 28, 2017
- AMDGPU: Remove SITypeRewriter · 7c525903
  Matt Arsenault authored Jun 28, 2017
  7c525903
- [AArch64] Make assert messages uniform and general [NFC] · 6f61e237
  Mandeep Singh Grang authored Jun 28, 2017
  6f61e237
- [AArch64][Falkor] Attempt to fix Windows buildbots · 0abd9806
  Geoff Berry authored Jun 28, 2017
  0abd9806
- Reuse existing variables. NFC. · d926ea2f
  Rafael Espindola authored Jun 28, 2017
  d926ea2f
- [AArch64][Falkor] Try to avoid exhausting HW prefetcher resources when unrolling. · 378374d4
  Geoff Berry authored Jun 28, 2017
  378374d4
- Reuse existing variable. NFC. · f530b322
  Rafael Espindola authored Jun 28, 2017
  f530b322
- Fix PR33625. · 96367a3d
  Rafael Espindola authored Jun 28, 2017
  96367a3d
- Don't repeat name in comment and format. NFC. · 1416c2d0
  Rafael Espindola authored Jun 28, 2017
  1416c2d0
- Don't repeat names and reformat. NFC. · 920fa140
  Rafael Espindola authored Jun 28, 2017
  920fa140
- [LoopUnroll] Pass SCEV to getUnrollingPreferences hook. NFCI. · 66d9bdbc
  Geoff Berry authored Jun 28, 2017
  66d9bdbc
- [AArch64] AArch64CondBrTuningPass generates wrong branch instructions · c0432d86
  Alexandros Lamprineas authored Jun 28, 2017
  c0432d86
- Don't repeat name in comments. 80 columns. NFC. · 9a450d9b
  Rafael Espindola authored Jun 28, 2017
  9a450d9b
- [ARM] Improve if-conversion for M-class CPUs without branch predictors · 75d76e5e
  John Brawn authored Jun 28, 2017
  75d76e5e
- [GlobalISel][X86] Support bitwise operations : G_AND, G_OR, G_XOR · d5b59cf9
  Igor Breger authored Jun 28, 2017
  d5b59cf9
- Reverting commit 306414 on behalf of @gadi.haber · f6684002
  Michael Zuckerman authored Jun 28, 2017
  f6684002
- [X86] Correct dwarf unwind information in function epilogue · 7b3a38ec
  Petar Jovanovic authored Jun 28, 2017
  7b3a38ec
- [ARM] Make -mcpu=generic schedule for an in-order core (Cortex-A8). · eecb353d
  Kristof Beyls authored Jun 28, 2017
  eecb353d
- [AMDGPU] Add pattern for v_alignbit_b32 with immediate · d4454556
  Stanislav Mekhanoshin authored Jun 28, 2017
  d4454556