Commits · bc843211fde1a1c6937b6d9bf3af670f0d10fd22 · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 20, 2018
- [SSAUpdaterBulk] Use PredCache in ComputeLiveInBlocks. · bc843211
  Michael Zolotukhin authored Apr 20, 2018
  bc843211
- [SSAUpdaterBulk] Use SmallVector instead of SmallPtrSet for uses. · 79cb54b2
  Michael Zolotukhin authored Apr 20, 2018
  79cb54b2
- Revert "This pass, fixing an erratum in some LEON 2 processors..." · 45571780
  Daniel Cederman authored Apr 20, 2018
  45571780
- [Sparc] Use synthetic instruction clr to zero register instead of sethi · c67b3ffb
  Daniel Cederman authored Apr 20, 2018
  c67b3ffb
- [AArch64][AsmParser] Extend RegOp with integrated 'shift/extend'. · 149916d2
  Sander de Smalen authored Apr 20, 2018
  149916d2
- AMDGPU: Legalize the operand of SI_INIT_M0 · 7a87977f
  Nicolai Haehnle authored Apr 20, 2018
  7a87977f
- [Sparc] Fix addressing mode when using 64-bit values in inline assembly · 793af3b9
  Daniel Cederman authored Apr 20, 2018
  793af3b9
- Fix build failures for r330387 on buildbots that don't build the X86 target · 5d15230c
  Vlad Tsyrklevich authored Apr 20, 2018
  5d15230c
- LowerTypeTests: Propagate symver directives · 230b2567
  Vlad Tsyrklevich authored Apr 20, 2018
  230b2567
- Move a dump() implementation out of line. · 6aacbf4d
  Amara Emerson authored Apr 20, 2018
  6aacbf4d
- [MachineOutliner] NFC: Move EnableLinkOnceODROutlining into MachineOutliner.cpp · 1eca23bd
  Jessica Paquette authored Apr 19, 2018
  1eca23bd
- [llvm-mca][X86] Add prefetch instruction resource tests · 0a6bfb18
  Simon Pilgrim authored Apr 19, 2018
  0a6bfb18
- [WebAssembly] Enabled -triple=wasm32-unknown-unknown-wasm path using ELF directive parser. · f009da24
  Sam Clegg authored Apr 19, 2018
  f009da24
Apr 19, 2018
- [Reassociate] add baseline tests for binop swapping; NFC · ad8976db
  Sanjay Patel authored Apr 19, 2018
  ad8976db
- [llvm-mca][FMA] Add FMA resource tests · 72091178
  Simon Pilgrim authored Apr 19, 2018
  72091178
- [AMDGPU] Use packed literals with zero either lower or hi part · 160f8579
  Stanislav Mekhanoshin authored Apr 19, 2018
  160f8579
- [llvm-objdump] Issue error message when object file cannot be created · bf26d540
  Gerolf Hoflehner authored Apr 19, 2018
  bf26d540
- [X86] Remove non-existant instruction name from X86DisassemblerTables.cpp. · 6496d512
  Craig Topper authored Apr 19, 2018
  6496d512
- Refine the loop rotation's API · 585f2699
  Jin Lin authored Apr 19, 2018
  585f2699
- [ORC] Fix an assertion condition from r329934. · ee68ec06
  Lang Hames authored Apr 19, 2018
  ee68ec06
- [X86] Enable popcnt false dependency breaking on Silvermont and Goldmont. · bc895a3a
  Craig Topper authored Apr 19, 2018
  bc895a3a
- [PM/LoopUnswitch] Detect irreducible control flow within loops and skip... · 32e62f9c
  Chandler Carruth authored Apr 19, 2018
  32e62f9c
- [ORC] Make VSO symbol resolution/finalization operations private. · 9bbd6530
  Lang Hames authored Apr 19, 2018
  9bbd6530
- [llvm-mca][X86] Add resource test for every out-of-order scheduler model · 4a486c13
  Simon Pilgrim authored Apr 19, 2018
  4a486c13
- [X86][SLM] Fix typo using SandyBridge resources. · 4ba057db
  Simon Pilgrim authored Apr 19, 2018
  4ba057db
- [X86] Correct the scheduling data for register forms of XCHG and XADD on Intel CPUs. · b5f26591
  Craig Topper authored Apr 19, 2018
  b5f26591
- [Reassociate] fix formatting; NFC · a201787f
  Sanjay Patel authored Apr 19, 2018
  a201787f
- [X86] Merge some MMX instregex · 5e492d29
  Simon Pilgrim authored Apr 19, 2018
  5e492d29
- [if-converter] Handle BBs that terminate in ret during diamond conversion · fbee8574
  Krzysztof Parzyszek authored Apr 19, 2018
  fbee8574
- [Hexagon] Use legal types when lowering CONCAT_VECTORS via BUILD_VECTOR · 2a9a83cd
  Krzysztof Parzyszek authored Apr 19, 2018
  2a9a83cd
- [llvm-objdump] Remove test object file · dca79d28
  Francis Visoiu Mistrih authored Apr 19, 2018
  dca79d28
- [llvm-objdump] Print "..." instead of random data for virtual sections · 1834682b
  Francis Visoiu Mistrih authored Apr 19, 2018
  1834682b
- [gold/ThinLTO] Invoke llvm_shutdown when exiting after ThinLTO indexing · aa94393e
  Teresa Johnson authored Apr 19, 2018
  aa94393e
- [AMDGPU] Do not only rely on BB number when finding bottom loop · 1bc6e71f
  Mark Searles authored Apr 19, 2018
  1bc6e71f
- [llvm-mca][X86] Add mmx instruction to btver2 resource tests · f209321d
  Simon Pilgrim authored Apr 19, 2018
  f209321d
- [NewGVN] Add ops as dependency if we cannot find a leader for ValueOp. · b789165e
  Florian Hahn authored Apr 19, 2018
  b789165e
- [Hexagon] Generate code for vector bswap intrinsics · d92c37e0
  Krzysztof Parzyszek authored Apr 19, 2018
  d92c37e0
- [X86][BtVer2] Remove SSE4A EXTRQ/EXTRQI InstRW overrides. · f21ace6c
  Simon Pilgrim authored Apr 19, 2018
  f21ace6c
- [Hexagon] Add/fix patterns for 32/64-bit vector compares and logical ops · 23bcf06a
  Krzysztof Parzyszek authored Apr 19, 2018
  23bcf06a
- [Unittests] Fix plugins test · aeb6c48d
  Mikhail Maltsev authored Apr 19, 2018
  aeb6c48d