Commits · c169b8798fc7492f447fba6e853ae55ae799d29c · Lorenzo Albano / LLVM bpEVL · GitLab

Jul 27, 2006
- Prevent creation of MachineDebugInfo for intel unless it is darwin. RC842. · c169b879
  Jim Laskey authored Jul 27, 2006
  c169b879
Jul 26, 2006
- New entry. · 23a21c19
  Evan Cheng authored Jul 26, 2006
  23a21c19
- Rename RelocModel::PIC to PIC_, to avoid conflicts with -DPIC. · 9e56e5c0
  Chris Lattner authored Jul 26, 2006
  9e56e5c0
Jul 25, 2006
- - Refactor the code that resolve basic block references to a TargetJITInfo · f6acb34d
  Evan Cheng authored Jul 25, 2006
  f6acb34d
- Can't commute shufps. The high / low parts elements come from different vectors. · 66ed41ca
  Evan Cheng authored Jul 25, 2006
  66ed41ca
- implement function calling of functions with up to 4 arguments · 8902fd70
  Rafael Espindola authored Jul 25, 2006
  8902fd70
Jul 22, 2006
- Done. · c0577648
  Evan Cheng authored Jul 21, 2006
  c0577648
Jul 21, 2006
- implemented sub · 976c93a1
  Rafael Espindola authored Jul 21, 2006
  976c93a1
- This opt is now handled in DAG combine. · 74065bed
  Evan Cheng authored Jul 21, 2006
  74065bed
- A splat of a vector constant of all zero or all one is the vector constant. · 4cf02387
  Evan Cheng authored Jul 20, 2006
  4cf02387
- Missing a space. · f98bc528
  Evan Cheng authored Jul 20, 2006
  f98bc528
Jul 20, 2006
- Clean up. · 683b9664
  Evan Cheng authored Jul 20, 2006
  683b9664
Jul 19, 2006
- New entry. · 8a881f23
  Evan Cheng authored Jul 19, 2006
  8a881f23
- Do once flag never set to true. · 181fb1c4
  Jim Laskey authored Jul 19, 2006
  181fb1c4
- Tidy up a few things. · 7c860afe
  Jim Laskey authored Jul 19, 2006
  7c860afe
- Reduce size of routine. Shrinks .o by 37%. · 18debc21
  Jim Laskey authored Jul 19, 2006
  18debc21
- bswapped load/store instructions are only availble in indexed addressing form. · 4f8eb5cc
  Chris Lattner authored Jul 19, 2006
  4f8eb5cc
- Bug#834 ICE (crash in code generator?) when building PCH . · 5ba7c23c
  Jim Laskey authored Jul 19, 2006
  5ba7c23c
- Misc. new entry. · 968a0b03
  Evan Cheng authored Jul 19, 2006
  968a0b03
- INC / DEC instructions have shorter code size than ADD32ri8, etc. · 02d8836c
  Evan Cheng authored Jul 19, 2006
  02d8836c
- Add code size to target instruction use it as the 3rd isel sorting tie-breaker. · c767acd2
  Evan Cheng authored Jul 19, 2006
  c767acd2
Jul 18, 2006
- initial prologue and epilogue implementation. Need to define add and sub before finishing it :-) · bf3a17cd
  Rafael Espindola authored Jul 18, 2006
  bf3a17cd
- Make the implicit def instructions look like other instrs. · b00b6c2e
  Chris Lattner authored Jul 18, 2006
  b00b6c2e
Jul 16, 2006
- skeleton of a lowerCall implementation for ARM · 75269be0
  Rafael Espindola authored Jul 16, 2006
  75269be0
Jul 15, 2006
- Remove what little AIX support we have. It has never been tested and isn't · e1758d4c
  Chris Lattner authored Jul 15, 2006
  e1758d4c
- Add an out-of-line virtual method for X86DwarfWriter to give it a home. · 2e1d0154
  Chris Lattner authored Jul 14, 2006
  2e1d0154
Jul 14, 2006
- Add missing PPC64 extload/truncstores · 96aecb5d
  Chris Lattner authored Jul 14, 2006
  96aecb5d
- Add a note · 950dffae
  Chris Lattner authored Jul 14, 2006
  950dffae
Jul 13, 2006
- Another fix in the rotate encodings, needed when the first two operands are not · 077b86a0
  Chris Lattner authored Jul 13, 2006
  077b86a0
- Print negative immediates as negative values instead of large constants · b42a945f
  Chris Lattner authored Jul 12, 2006
  b42a945f
- Fix encoding of rotates, such as rldicl · dd57ac48
  Chris Lattner authored Jul 12, 2006
  dd57ac48
Jul 12, 2006
- Implement PPC64 relocations types · 5b17dee7
  Chris Lattner authored Jul 12, 2006
  5b17dee7
- An overaggressive #ifdef allows a function to fall off the bottom of the · 1ec5e73b
  Chris Lattner authored Jul 12, 2006
  1ec5e73b
- Add information preventing several register class constraints from working. · c8db1072
  Chris Lattner authored Jul 12, 2006
  c8db1072
Jul 11, 2006
- The PPC64 JIT needs register numbers to encode instructions. · 6e662083
  Chris Lattner authored Jul 11, 2006
  6e662083
- Emit inc / dec of registers as one byte instruction. · d5a086ab
  Evan Cheng authored Jul 11, 2006
  d5a086ab
- It was pointed out that DEBUG() is only available with -debug. · f7300b27
  Jim Laskey authored Jul 11, 2006
  f7300b27
- Ensure that dump calls that are associated with asserts are removed from · c3d341ea
  Jim Laskey authored Jul 11, 2006
  c3d341ea
- add the memri memory operand · 185c5c2b
  Rafael Espindola authored Jul 11, 2006
  185c5c2b
- Implement the inline asm 'A' constraint. This implements PR825 and · 298ef37e
  Chris Lattner authored Jul 11, 2006
  298ef37e