Commits · e4c8c807bb609daa9be3fb9977703355b119fe8c · Lorenzo Albano / LLVM bpEVL · GitLab

Jan 24, 2015
- BPF backend · e4c8c807
  Alexei Starovoitov authored Jan 24, 2015
  e4c8c807
- [mips] Fix 'jumpy' debug line info around calls. · 9a4f2c55
  Daniel Sanders authored Jan 24, 2015
  9a4f2c55
- [mips] Fix assertion on i128 addition/subtraction on MIPS64 · 5a9225b2
  Daniel Sanders authored Jan 24, 2015
  5a9225b2
- [PM] Rework how the TargetLibraryInfo pass integrates with the new pass · c0291865
  Chandler Carruth authored Jan 24, 2015
  c0291865
- [AArch64][LoadStoreOptimizer] Form LDPSW when possible. · 29f55339
  Quentin Colombet authored Jan 24, 2015
  29f55339
- [x86] Fix a comment · ddcc2e31
  Bruno Cardoso Lopes authored Jan 24, 2015
  ddcc2e31
- R600/SI: Emit .hsa.version section for amdhsa OS · edd188c4
  Tom Stellard authored Jan 23, 2015
  edd188c4
Jan 23, 2015
- [x86] Combine x86mmx/i64 to v2i64 conversion to use scalar_to_vector · 56567f91
  Bruno Cardoso Lopes authored Jan 23, 2015
  56567f91
- R600/SI: Move i64 -> v2i32 load promotion into AMDGPUDAGToDAGISel::Select() · 20f6c073
  Tom Stellard authored Jan 23, 2015
  20f6c073
- [mips] fix spelling of 'disassembler' · 4ea2f606
  Alexei Starovoitov authored Jan 23, 2015
  4ea2f606
- Classify functions by EH personality type rather than using the triple · 5cc1569c
  Reid Kleckner authored Jan 23, 2015
  5cc1569c
- Remove some local variables in place of just querying for them · a1c6e0c8
  Eric Christopher authored Jan 23, 2015
  a1c6e0c8
- [mips] Add new error message and improve testing for parsing the .module directive. · c405c822
  Toma Tabacu authored Jan 23, 2015
  c405c822
- This patch fixes issue with lowering below mentioned pattern :- · f1d7050a
  Jyoti Allur authored Jan 23, 2015
  f1d7050a
- [x86] Change u8imm operands to always print as unsigned. This makes shuffle... · 0271d10d
  Craig Topper authored Jan 23, 2015
  0271d10d
- [X86] Add IntrNoMem to the AVX512 conflict intrinsics. · 46469aa4
  Craig Topper authored Jan 23, 2015
  46469aa4
- Reformat. · 2bbc90cc
  NAKAMURA Takumi authored Jan 23, 2015
  2bbc90cc
- MipsAsmParser.cpp: Suppress a warning introduced in r226657. [-Wunused-variable] · f6eee4ad
  NAKAMURA Takumi authored Jan 23, 2015
  f6eee4ad
- R600: Try to use lower types for 64bit division if possible · 5f715d36
  Jan Vesely authored Jan 22, 2015
  5f715d36
- R600: Simplify LowerUDIVREM · f7987ca5
  Jan Vesely authored Jan 22, 2015
  f7987ca5
Jan 22, 2015
- [X86][AVX] Added (V)MOVDDUP / (V)MOVSLDUP / (V)MOVSHDUP memory folding + tests. · 7e6d573e
  Simon Pilgrim authored Jan 22, 2015
  7e6d573e
- AArch64: decode all MRS/MSR forms early to avoid saving FeatureBits. · 7cd58934
  Tim Northover authored Jan 22, 2015
  7cd58934
- Mark |TLI| variables used to suppress -Wunused-variable warnings. · a007905e
  Alexander Potapenko authored Jan 22, 2015
  a007905e
- Fixed a bug in type legalizer for masked load/store intrinsics. · 150d9f31
  Elena Demikhovsky authored Jan 22, 2015
  150d9f31
- Revert r226798. Guess I missed the patterns. · e0c8e8f6
  Craig Topper authored Jan 22, 2015
  e0c8e8f6
- Use u8imm instead of i32i8imm on a couple instructions that have no patterns... · ffef4cf1
  Craig Topper authored Jan 22, 2015
  ffef4cf1
- [X86] Remove some unused multiclasses from AVX512 instruction file. · 9b39e540
  Craig Topper authored Jan 22, 2015
  9b39e540
- ARM: fail less catastrophically on invalid Windows input · 10ed0bab
  Saleem Abdulrasool authored Jan 22, 2015
  10ed0bab
- [X86][SSE] Missing SSE/AVX1 memory folding integer instructions · 5fa0fb23
  Simon Pilgrim authored Jan 21, 2015
  5fa0fb23
Jan 21, 2015
- [X86][SSE] Added support for SSE3 lane duplication shuffle instructions · b16b09b1
  Simon Pilgrim authored Jan 21, 2015
  b16b09b1
- Fix load-store optimizer on thumbv4t · 229eb4ca
  Jon Roelofs authored Jan 21, 2015
  229eb4ca
- [X86][SSE] movddup shuffle mask decodes · 47af023a
  Simon Pilgrim authored Jan 21, 2015
  47af023a
- R600/SI: Custom lower fround · b0055488
  Matt Arsenault authored Jan 21, 2015
  b0055488
- [Hexagon] Converting multiply and accumulate with immediate intrinsics to patterns. · 94269db8
  Colin LeMahieu authored Jan 21, 2015
  94269db8
- [X86] Declare SSE4.1/AVX2 vector extloads covered by PMOV[SZ]X legal. · 8f09e9f7
  Ahmed Bougacha authored Jan 21, 2015
  8f09e9f7
- AArch64: add backend option to reserve x18 (platform register) · b9184f2b
  Tim Northover authored Jan 21, 2015
  b9184f2b
- [x32] Fast ISel should use LEA64_32r instead of LEA32r to adjust addresses in x32 mode. · ada9fa1c
  Michael Kuperstein authored Jan 21, 2015
  ada9fa1c
- [mips][microMIPS] MicroMIPS 16-bit unconditional branch instruction B · 5cfebdde
  Jozef Kolek authored Jan 21, 2015
  5cfebdde
- [mips][microMIPS] Implement ADDIUPC instruction · 2c6d7320
  Jozef Kolek authored Jan 21, 2015
  2c6d7320
- [Mips][Disassembler]When disassembler meets load/store from coprocessor 2... · 435cf8a4
  Vladimir Medic authored Jan 21, 2015
  435cf8a4