llvm-svn: 85640

llvm-svn: 85637

unfolding loads for hoisting.  getOpcodeAfterMemoryUnfold returns the
opcode of the original operation without the load, not the load
itself, MachineLICM needs to know the operand index in order to get
the correct register class. Extend getOpcodeAfterMemoryUnfold to
return this information.

llvm-svn: 85622

llvm-svn: 85608

common tail, except when the OptimizeForSize function attribute is present.
Radar 7338114.

llvm-svn: 85441

otherwise unhoistable instructions in order to allow the loads
to be hoisted.

llvm-svn: 85364

MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360

if they have compatible encodings.

llvm-svn: 85359

llvm-svn: 85127

strides for now, because it doesn't handle them correctly. This fixes a
miscompile of SingleSource/Benchmarks/Misc-C++/ray.

This problem was usually hidden because indvars transforms such induction
variables into negations of canonical induction variables.

llvm-svn: 85118

  bootstrapping. It's not safe to leave identity subreg_to_reg and insert_subreg
  around.
- Relax register scavenging to allow use of partially "not-live" registers. It's
  common for targets to operate on registers where the top bits are undef. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
     = d0
  When the insert_subreg is eliminated by the coalescer, the scavenger used to
  complain. The previous fix was to keep to insert_subreg around. But that's
  brittle and it's overly conservative when we want to use the scavenger to 
  allocate registers. It's actually legal and desirable for other instructions
  to use the "undef" part of d0. e.g.
  s0 =
  d0 = insert_subreg d0<undef>, s0, 1
  ...
  s1 =
     = s1
     = d0
  We probably need add a "partial-undef" marker on machine operand so the
  machine verifier would not complain.

llvm-svn: 85091

or global after a function with conflicting names.  Update some testcases
that were accidentally depending on this behavior.

llvm-svn: 85081

the scale overflows pointer-sized arithmetic. This fixes PR5281.

llvm-svn: 84954

llvm-svn: 84932

Allow the target to select the level of anti-dependence breaking that should be performed by the post-RA scheduler. The default is none.

llvm-svn: 84911

to break up CFG diamonds by banishing one of the blocks to the end of
the function, which is bad for code density and branch size.

This does pessimize MultiSource/Benchmarks/Ptrdist/yacr2, the
benchmark cited as the reason for the change, however I've examined
the code and it looks more like a case of gaming a particular
branch than of being generally applicable.

llvm-svn: 84803

llvm-svn: 84727

llvm-svn: 84658

encounters an OEQ or UNE comparison, and update its callers to check
for this return status and recover. This fixes a problem resulting from
the LowerOperation hooks being called from LegalizeVectorOps, because
LegalizeVectorOps only lowers vectors, so OEQ and UNE comparisons may
still be at large. This fixes PR5092.

llvm-svn: 84640

tracked. Instead of trying to manually keep track of these locations
while doing complex modifications, just recompute them when they're needed.
This fixes a bug in which the TopMBB and BotMBB were not correctly updated,
leading to invalid transformations.

llvm-svn: 84598

llvm-svn: 84586

llvm-svn: 84516

LLC was scheduling compares before the adds causing wrong branches to be taken
in programs, resulting in misoptimized code wherever atomic adds where used.

llvm-svn: 84485

llvm-svn: 84459

llvm-svn: 84431

to be more general and understand more varieties of loops.

Teach CodePlacementOpt to reorganize the basic blocks of a loop so that
they are contiguous. This also includes a fair amount of logic for preserving
fall-through edges while doing so. This fixes a BranchFolding-ism where blocks
which can't be made to use a fall-through edge and don't conveniently fit
anywhere nearby get tossed out to the end of the function.

llvm-svn: 84295

llvm-svn: 84282

llvm-svn: 84280

load, to help SelectionDAG fold them into the loads, unless
conditions are unfavorable.

llvm-svn: 84271

header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.

Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.

llvm-svn: 84158

When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.

llvm-svn: 84153

and convert it to FileCheck.

llvm-svn: 84065

it to hold the address of an sret return value, for x86-64 ABI purposes.

Also, fix the test that was originally intended to test this to actually
test it, using FileCheck.

llvm-svn: 83853

when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.

llvm-svn: 83670

llvm-svn: 83622

llvm-svn: 83608

llvm-svn: 83499

verbose-asm mode, print comments instead. This eliminates a non-comment
difference between verbose-asm mode and non-verbose-asm mode.

Also, factor out the relevant code out of all the targets and into
target-independent code.

llvm-svn: 83392

Restore the -post-RA-scheduler flag as an override for the target specification. Remove -mattr for setting PostRAScheduler enable and instead use CPU string.

llvm-svn: 83215

llvm-svn: 83128