Now that most of the methods in Clang and LLVM that were parsing arch/cpu/fpu
strings are using ARMTargetParser, it's time to make it a bit more conforming
with what the ABI says.

This commit adds some clarification on what build attributes are accepted and
which are "non-standard". It also makes clear that the "defaultCPU" and
"defaultArch" methods were really just build attribute getters.

It also diverges from GCC's behaviour to say that armv2/armv3 are really an
ARMv4 in the build attributes, when the ABI has a clear state for that: Pre-v4.

llvm-svn: 238344

llvm-svn: 238343

This commit a 3rd attempt at comitting the initial MIR serialization patch.
The first commit (r237708) was reverted in 237730. Then the second commit
(r237954) was reverted in r238007, as the MIR library under CodeGen caused
a circular dependency where the CodeGen library depended on MIR and MIR
library depended on CodeGen.

This commit has fixed the dependencies between CodeGen and MIR by
reorganizing the MIR serialization code - the code that prints out
MIR has been moved to CodeGen, and the MIR library has been renamed
to MIRParser. Now the CodeGen library doesn't depend on the
MIRParser library, thus the circular dependency no longer exists.

--Original Commit Message--

MIR Serialization: print and parse LLVM IR using MIR format.

This commit is the initial commit for the MIR serialization project.
It creates a new library under CodeGen called 'MIR'. This new
library adds a new machine function pass that prints out the LLVM IR
using the MIR format. This pass is then added as a last pass when a
'stop-after' option is used in llc. The new library adds the initial
functionality for parsing of MIR files as well. This commit also
extends the llc tool so that it can recognize and parse MIR input files.

Reviewers: Duncan P. N. Exon Smith, Matthias Braun, Philip Reames

Differential Revision: http://reviews.llvm.org/D9616 

llvm-svn: 238341

reviewer: tstellardAMD
llvm-svn: 238337

v2: TargetLoweringBase:: -> TargetLowering::
    Use Ops array
v3: Explicitly use value 0 for ?DIV
    Remove redundant newline

Differential revision: http://reviews.llvm.org/D7803
reviewer: ab

llvm-svn: 238336

Counter symbols created for linkonce functions are not discarded by ELF
linkers unless the symbols are placed in the same comdat section as its
associated function.

llvm-svn: 238335

Differential Revision: http://reviews.llvm.org/D9739

llvm-svn: 238333

llvm-svn: 238332

llvm-svn: 238331

llvm-svn: 238330

llvm-svn: 238329

llvm-svn: 238328

llvm-svn: 238327

This patch implements microMIPS32r6 BEQZALC, BGEZALC, BGTZALC, BLEZALC, BLTZALC
and BNEZALC instructions using mapping.

Differential Revision: http://reviews.llvm.org/D10031

llvm-svn: 238325

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238322

llvm-svn: 238320

llvm-svn: 238317

llvm-svn: 238315

llvm-svn: 238311

manager arguments...

I have no idea why, but compilers seem to hate this and its late, so I'm
not going to debug it. :: sigh :: This is why we can't have nice things.

llvm-svn: 238306

when invoking run methods.

This technique was suggested by Dinesh Dwivedi who also wrote the
original patch. During the code review, they explained to me that this
isn't a fully general technique as we need to know the signatures of the
method candidates. Since this is really a narrower utility, I switched
the names and structure to be more clearly a specialized run method
invoke helper and commented it accordingly. I still think this is
a pretty big win.

Very sorry to Dinesh for the extreme delay in landing this patch. I've
been far to busy poking at other things.

Original review: http://reviews.llvm.org/D3543

llvm-svn: 238305

This broke the llvm-mips-linux builder and several of our out-of-tree builders.
Initial investigations show that the commit probably isn't the problem but
reverting anyway while I investigate.

llvm-svn: 238302

Implemented DAG lowering for all these forms.
Added tests for DAG lowering and encoding.

By Igor Breger (igor.breger@intel.com)

llvm-svn: 238301

reviwes.llvm.org to help reduce confusion.

llvm-svn: 238295

With this patch the x86 backend is now shrink-wrapping capable
and this functionality can be tested by using the
-enable-shrink-wrap switch.

The next step is to make more test and enable shrink-wrapping by
default for x86.

Related to <rdar://problem/20821487>

llvm-svn: 238293

the target can handle a given basic block as prologue
or epilogue.

Related to <rdar://problem/20821487>

llvm-svn: 238292

llvm-svn: 238289

- Clean documentation comment
- Change the API to accept an iterator so you can actually pass
  MachineBasicBlock::end() now.
- Add more "const".

llvm-svn: 238288

This shouldn't happen, but it's nice not to abort when printing broken machine
functions.

llvm-svn: 238287

llvm-svn: 238277

model the dense vector instruction bonuses.

Previously, this code really didn't effectively compute the density of
inlined vector instructions and apply the intended inliner bonus. It
would try to compute it repeatedly while analyzing the function and
didn't handle the case where future vector instructions would tip the
scales back towards the bonus.

Instead, speculatively apply all possible bonuses to the threshold
initially. Once we *know* that a certain bonus can not be applied,
subtract it. This should delay early bailout enough to get much more
consistent results without actually causing us to analyze huge swaths of
code. I expect some (hopefully mild) compile time hit here, and some
swings in performance, but this was definitely the intended behavior of
these bonuses.

This also dramatically simplifies the computation of the bonuses to not
interact with each other in confusing ways. The previous code didn't do
a good job of this and the values for bonuses may be surprising but are
at least now clearly written in the code.

Finally, fix code to be in line with comments and use zero as the
bailout condition.

Patch by Easwaran Raman, with some comment tweaks by me to try and
further clarify what is going on with this code.

http://reviews.llvm.org/D8267

llvm-svn: 238276

This type is described in the PE/COFF spec section 7.1.

llvm-svn: 238275

It can be triggered by user input.

Bug found with AFL fuzz.

llvm-svn: 238272

Bug found with AFL fuzz.

llvm-svn: 238269

llvm-svn: 238268

Bug found with AFL fuzz.

llvm-svn: 238265

llvm-svn: 238264

Shouldn't be an assert, since user input can trigger it.

Bug found with AFL fuzz.

llvm-svn: 238261

llvm-svn: 238255

Long ago, the poll insertion code assumed that the insertion site was a terminator.  As a result, the entry selection code would split a basic block to ensure it could pass a terminator.  The insertion code was updated quite a while ago - possibly before it ever landed upstream - but the now redundant work was never removed.  

While I'm at it, remove a comment which doesn't apply to the upstreamed code.  

NFC intended.

llvm-svn: 238254