llvm-svn: 190746

llvm-svn: 190744

equivalent to "beq $zero, $zero, offset".

llvm-svn: 190220

This patch adds support for microMIPS Move to/from HI/LO instructions. Test cases are included in patch.

llvm-svn: 190152

This patch adds support for microMIPS Move Conditional instructions. Test cases are included in patch.

llvm-svn: 190148

llvm-svn: 189213

llvm-svn: 188176

Moving definition of MnemonicContainsDot field from class Instruction to class AsmParser as suggested.

llvm-svn: 187569

llvm-svn: 187443

register operands.

llvm-svn: 187242

operands.

llvm-svn: 187238

llvm-svn: 186507

 This patch represents Mips utilization of r186388 code that alows asm matcher to emit mnemonics contain '.' characters. This makes asm parser code simpler and more efficient.

llvm-svn: 186397

llvm-svn: 186151

llvm-svn: 186000

llvm-svn: 185999

By default, a teq instruction is inserted after integer divide. No divide-by-zero
checks are performed if option "-mnocheck-zero-division" is used.

llvm-svn: 182306

Patch by Zoran Jovanovic.

llvm-svn: 180241

Patch by Zoran Jovanovic.

llvm-svn: 180238

This patch adds support for recoded (meaning assembly-language compatible to
standard mips32) arithmetic 32-bit instructions.

Patch by Zoran Jovanovic.

llvm-svn: 179873

original JALR instruction with one register operand to be a pseudo-instruction.

llvm-svn: 174657

llvm-svn: 174546

llvm-svn: 171515

llvm-svn: 171510

instructions.

llvm-svn: 170956

llvm-svn: 170955

llvm-svn: 170954

llvm-svn: 170952

llvm-svn: 170944

llvm-svn: 170942

llvm-svn: 170940

llvm-svn: 170939

information from the rest. 

llvm-svn: 170664

from the rest. 

llvm-svn: 170663

parameter.

llvm-svn: 170661

Separate encoding information from the rest.

llvm-svn: 170659

Separate encoding information from the rest.

llvm-svn: 170657

information from the rest.

llvm-svn: 170650

from the rest.

llvm-svn: 170649

Separate encoding information from the rest.

llvm-svn: 170648