- Sep 06, 2016
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George Rimar authored
Patch implements FILL just as alias for =fillexpr. This allows to make implementation much shorted and simpler than D24186. Differential revision: https://reviews.llvm.org/D24227 llvm-svn: 280708
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Dimitar Vlahovski authored
MSVC emits an error when one uses a const variable in a lambda without capturing it. gcc and clang don't emit an error in this scenario. llvm-svn: 280707
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Simon Dardis authored
LLVM PR/29052 highlighted that FastISel for MIPS attempted to lower arguments assuming that it was using the paired 32bit registers to perform operations for f64. This mode of operation is not supported for MIPSR6. This patch resolves the reported issue by adding additional checks for unsupported floating point unit configuration. Thanks to mike.k for reporting this issue! Reviewers: seanbruno, vkalintiris Differential Review: https://reviews.llvm.org/D23795 llvm-svn: 280706
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Krzysztof Parzyszek authored
Unlike PPC64, PPC32/SVRV4 does not have red zone. In the absence of it there is no guarantee that this part of the stack will not be modified by any interrupt. To avoid this, make sure to claim the stack frame first before storing into it. This fixes https://llvm.org/bugs/show_bug.cgi?id=26519. Differential Revision: https://reviews.llvm.org/D24093 llvm-svn: 280705
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Pavel Labath authored
Android targets don't have std::to_string and std::stoul. Use llvm::to_string and strtoul instead. llvm-svn: 280704
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Dimitar Vlahovski authored
This reverts commit rL280668 because the register tests fail on i386 Linux. I investigated a little bit what causes the failure - there are missing registers when running 'register read -a'. This is the output I got at the bottom: """ ... Memory Protection Extensions: bnd0 = {0x0000000000000000 0x0000000000000000} bnd1 = {0x0000000000000000 0x0000000000000000} bnd2 = {0x0000000000000000 0x0000000000000000} bnd3 = {0x0000000000000000 0x0000000000000000} unknown: 2 registers were unavailable. """ Also looking at the packets exchanged between the client and server: """ ... history[308] tid=0x7338 < 19> send packet: $qRegisterInfo4a#d7 history[309] tid=0x7338 < 130> read packet: $name:bnd0;bitsize:128;offset:1032;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:101;dwarf:101;#48 history[310] tid=0x7338 < 19> send packet: $qRegisterInfo4b#d8 history[311] tid=0x7338 < 130> read packet: $name:bnd1;bitsize:128;offset:1048;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:102;dwarf:102;#52 history[312] tid=0x7338 < 19> send packet: $qRegisterInfo4c#d9 history[313] tid=0x7338 < 130> read packet: $name:bnd2;bitsize:128;offset:1064;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:103;dwarf:103;#53 history[314] tid=0x7338 < 19> send packet: $qRegisterInfo4d#da history[315] tid=0x7338 < 130> read packet: $name:bnd3;bitsize:128;offset:1080;encoding:vector;format:vector-uint64;set:Memory Protection Extensions;ehframe:104;dwarf:104;#54 history[316] tid=0x7338 < 19> send packet: $qRegisterInfo4e#db history[317] tid=0x7338 < 76> read packet: $name:bndcfgu;bitsize:64;offset:1096;encoding:vector;format:vector-uint8;#99 history[318] tid=0x7338 < 19> send packet: $qRegisterInfo4f#dc history[319] tid=0x7338 < 78> read packet: $name:bndstatus;bitsize:64;offset:1104;encoding:vector;format:vector-uint8;#8e ... """ The bndcfgu and bndstatus registers don't have the 'Memory Protections Extension' set. I looked at the code and it seems that that is set correctly. So I'm not sure what's the problem or where does it come from. Also there is a second failure related to something like this in the tests: """ registerSet.GetName().lower() """ For some reason the registerSet.GetName() returns None. llvm-svn: 280703
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Pierre Gousseau authored
[clang-cl] Check that we are in clang cl mode before enabling support for the CL environment variable. Checking for the type of the command line tokenizer should not be the criteria to enable support for the CL environment variable, this change checks that we are in clang-cl mode instead. Differential Revision: https://reviews.llvm.org/D23503 llvm-svn: 280702
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Leny Kholodov authored
Use llvm::DINode::DIFlags type (strongly typed enum) for debug flags instead of unsigned int to avoid problems on platforms with sizeof(int) < 4: we already have flags with values > (1 << 16). Patch by: Victor Leschuk <vleschuk@gmail.com> Differential Revision: https://reviews.llvm.org/D23767 llvm-svn: 280701
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Leny Kholodov authored
Use ADT/BitmaskEnum for DINode::DIFlags for the following purposes: Get rid of unsigned int for flags to avoid problems on platforms with sizeof(int) < 4 Flags are now strongly typed Patch by: Victor Leschuk <vleschuk@gmail.com> Differential Revision: https://reviews.llvm.org/D23766 llvm-svn: 280700
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Alexey Bader authored
Summary: Remove access qualifiers on images in arg info metadata: * kernel_arg_type * kernel_arg_base_type Image access qualifiers are inseparable from type in clang implementation, but OpenCL spec provides a special query to get access qualifier via clGetKernelArgInfo with CL_KERNEL_ARG_ACCESS_QUALIFIER. Besides that OpenCL conformance test_api get_kernel_arg_info expects image types without access qualifier. Patch by Evgeniy Tyurin. Reviewers: bader, yaxunl, Anastasia Subscribers: cfe-commits Differential Revision: https://reviews.llvm.org/D23915 llvm-svn: 280699
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Silviu Baranga authored
Summary: In addition to not including the register operand of the current instruction also don't include any aliasing registers. We can't consider these as candidates because using them will clobber the corresponding register operand of the current instruction. This change doesn't include a test case and it would probably be difficult to produce a stable one since the bug depends on the results of register allocation. Reviewers: MatzeB, qcolombet, hfinkel Subscribers: hfinkel, llvm-commits Differential Revision: https://reviews.llvm.org/D24130 llvm-svn: 280698
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Pavel Labath authored
The commit introduced an array of const objects, which libstdc++ does not like. Make the object non-const. Also fix a compiler warning while I'm in there. llvm-svn: 280697
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Craig Topper authored
We need to bitcast the index operand to a floating point type so that it matches the result type. If not then the passthru part of the DAG will be a bitcast from the index's original type to the destination type. This makes it very difficult to match. The other option would be to add 5 sets of patterns for every other possible type. llvm-svn: 280696
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Craig Topper authored
[AVX-512] Add a test case to show that we don't select masked vpermi2ps when the index operand comes from a bitcast. It doesn't work because we're looking for a bitcast from the v4i32 index operand to v4f32 for the passthru part of the DAG. But since the index is bitcasted from v2i64 and bitcasts fold, we actually have a bitcast from v2i64 to v4f32 in the passthru part of the DAG. Taken from optimized output from clang's test case. llvm-svn: 280695
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Craig Topper authored
llvm-svn: 280694
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Craig Topper authored
llvm-svn: 280693
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Sean Callanan authored
When a process stops due to a crash, we get the crashing instruction and the crashing memory location (if there is one). From the user's perspective it is often unclear what the reason for the crash is in a symbolic sense. To address this, I have added new fuctionality to StackFrame to parse the disassembly and reconstruct the sequence of dereferneces and offsets that were applied to a known variable (or fuction retrn value) to obtain the invalid pointer. This makes use of enhancements in the disassembler, as well as new information provided by the DWARF expression infrastructure, and is exposed through a "frame diagnose" command. It is also used to provide symbolic information, when available, in the event of a crash. The algorithm is very rudimentary, and it needs a bunch of work, including - better parsing for assembly, preferably with help from LLVM - support for non-Apple platforms - cleanup of the algorithm core, preferably to make it all work in terms of Operands instead of register/offset pairs - improvement of the GetExpressioPath() logic to make prettier expression paths, and - better handling of vtables. I welcome all suggestios, improvements, and testcases. llvm-svn: 280692
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Justin Bogner authored
This isn't the right thing to do - it turns out a number of the APIs that "never fail" just exit(1) if something bad happens. We can and should thread Error through this instead. That diff will make more sense with this reverted. Sorry for the noise. This reverts r280690 llvm-svn: 280691
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Justin Bogner authored
This simplifies ListReducer and most of its subclasses by removing the std::string &Error that was threaded through all of them but almost never used. If we end up needing error handling in more places here we can reinstate it using llvm::Error instead of these unwieldy strings. The 2 cases (out of 12) that actually can hit the error cases are a little bit awkward now, but those will clean up as I refactor this API further. llvm-svn: 280690
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Saleem Abdulrasool authored
This is a Windows ARM specific issue. If the code path in the if conversion ends up using a relocation which will form a IMAGE_REL_ARM_MOV32T, we end up with a bundle to ensure that the mov.w/mov.t pair is not split up. This is normally fine, however, if the branch is also predicated, then we end up trying to predicate the bundle. For now, report a bundle as being unpredicatable. Although this is false, this would trigger a failure case previously anyways, so this is no worse. That is, there should not be any code which would previously have been if converted and predicated which would not be now. Under certain circumstances, it may be possible to "predicate the bundle". This would require scanning all bundle instructions, and ensure that the bundle contains only predicatable instructions, and converting the bundle into an IT block sequence. If the bundle is larger than the maximal IT block length (4 instructions), it would require materializing multiple IT blocks from the single bundle. llvm-svn: 280689
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Mehdi Amini authored
This reverts commit r280686, bots are broken. llvm-svn: 280688
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Mehdi Amini authored
llvm-svn: 280687
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Mehdi Amini authored
Use ADT/BitmaskEnum for DINode::DIFlags for the following purposes: * Get rid of unsigned int for flags to avoid problems on platforms with sizeof(int) < 4 * Flags are now strongly typed Patch by: Victor Leschuk <vleschuk@gmail.com> Differential Revision: https://reviews.llvm.org/D23766 llvm-svn: 280686
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Mehdi Amini authored
The latest MSVC update apparently resolve the call from the const ref variant to itself, leading to an infinite recursion. It is not clear to me why the r-value overload is not selected. `ValueT` is a pointer type, and the functional-style cast in the call `insert_as(ValueT(V), LookupKey);` should result in a r-value ref. A bug in MSVC? Differential Revision: https://reviews.llvm.org/D23956 llvm-svn: 280685
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Craig Topper authored
llvm-svn: 280684
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Saleem Abdulrasool authored
All of the builtins are designed to be invoked with ARM AAPCS CC even on ARM AAPCS VFP CC hosts. Tweak the default initialisation to ARM AAPCS CC rather than C CC for ARM/thumb targets. The changes to the tests are necessary to ensure that the calling convention for the lowered library calls are honoured. Furthermore, these adjustments cause certain branch invocations to change to branch-and-link since the returned value needs to be moved across registers (d0 -> r0, r1). llvm-svn: 280683
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Craig Topper authored
[AVX-512] Teach fastisel load/store handling to use EVEX encoded instructions for 128/256-bit vectors and scalar single/double. Still need to fix the register classes to allow the extended range of registers. llvm-svn: 280682
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Craig Topper authored
[X86] Update fast-isel store test to have more 256 and 512-bit test cases. Add command lines for AVX and AVX512 feature sets. llvm-svn: 280681
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Craig Topper authored
[X86] Update fast-isel vector load test to have more 256 and 512-bit test cases. Add a command line for SKX features too. llvm-svn: 280680
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Sanjay Patel authored
The script (utils/update_test_checks.py) seems to have problems with variable names that start with the same string. llvm-svn: 280679
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Gor Nishanov authored
Summary: Move early uses of spilled variables after CoroBegin. For example, if a parameter had address taken, we may end up with the code like: define @f(i32 %n) { %n.addr = alloca i32 store %n, %n.addr ... call @coro.begin This patch fixes the problem by moving uses of spilled variables after CoroBegin. Reviewers: majnemer Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D24234 llvm-svn: 280678
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Sanjay Patel authored
This is effectively a revert of: https://reviews.llvm.org/rL280115 And this should fix https://llvm.org/bugs/show_bug.cgi?id=30281: llvm-svn: 280677
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Todd Fiala authored
As Pavel pointed out in a comment on llvm.org/pr30271, the VPATH I was using here to eliminate duplication of a .cpp file had a side effect of attempting to pull in a .o/.obj file from that same parent dir, where other tests can be running in parallel. This is no good. For now, I have removed the VPATH, which should address llvm.org/pr30271. I have also removed the XFAIL. llvm-svn: 280675
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- Sep 05, 2016
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Ahmed Bougacha authored
Lots of unittests started failing under asan after r280455. It seems they've been failing for a long time, but lit silently ignored them. Downgrade the error so we can figure out what is going on. Filed http://llvm.org/PR30285. llvm-svn: 280674
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Craig Topper authored
[AVX-512] Integrate mask register copying more completely into X86InstrInfo::copyPhysReg and simplify. No functional change intended. The code is now written in terms of source and dest classes with feature checks inside each type of copy instead of having separate functions for each feature set. llvm-svn: 280673
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Ed Schouten authored
I'm in the progress of adding ARMv6 support to CloudABI. On the compiler side, everything seems to work properly with this tiny change applied. llvm-svn: 280672
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Simon Pilgrim authored
'Failure to recognise i64 sitofp/uitofp conversions that can be performed as i32' llvm-svn: 280671
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Simon Pilgrim authored
'Failure to recognise uitofp conversions that can be performed as sitofp' llvm-svn: 280670
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Dimitry Andric authored
Summary: During building of recent compiler-rt sources on FreeBSD for arm, I noticed that our unwind.h (which originates in libunwind) was missing the `_US_ACTION_MASK` constant: compiler-rt/lib/builtins/gcc_personality_v0.c:187:18: error: use of undeclared identifier '_US_ACTION_MASK' if ((state & _US_ACTION_MASK) != _US_UNWIND_FRAME_STARTING) ^ It appears that both clang's internal unwind.h, and libgcc's unwind.h define this constant as 3, so let's add this to libunwind's version too. Reviewers: logan, kledzik, davide, emaste Subscribers: joerg, davide, aemerson, emaste, llvm-commits Differential Revision: https://reviews.llvm.org/D24222 llvm-svn: 280669
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