TwoAddressInstructionPass.cpp

        // Update live variables for regB.
        if (KillMO) {
          if (!FirstKeptMO) {
            // All uses of regB are being replaced; move the kill to prevMI.
            if (LV && LV->removeVirtualRegisterKilled(regB, mi))
              LV->addVirtualRegisterKilled(regB, prevMI);
          } else {
            if (!KillMOKept) {
              // The kill marker is on an operand being replaced, but there
              // are other uses of regB remaining.  Move the kill marker to
              // one of them.
              KillMO->setIsKill(false);
              FirstKeptMO->setIsKill(true);
            }
          }
        }

        DEBUG(errs() << "\t\tprepend:\t" << *prevMI);

        // Replace uses of regB with regA.
        for (unsigned i = 0, e = mi->getNumOperands(); i != e; ++i) {
          MachineOperand &MO = mi->getOperand(i);
          if (MO.isReg() && MO.getReg() == regB && MO.isUse()) {

            // Skip operands that are tied to other register definitions.
            unsigned dsti = 0;
            if (mi->isRegTiedToDefOperand(i, &dsti) && dsti != ti)
              continue;

            MO.setReg(regA);
          }
        }

        assert(mi->getOperand(ti).isDef() && mi->getOperand(si).isUse());
        mi->getOperand(ti).setReg(mi->getOperand(si).getReg());
        MadeChange = true;

        DEBUG(errs() << "\t\trewrite to:\t" << *mi);
      }

      mi = nmi;
    }
  }

  // Some remat'ed instructions are dead.
  int VReg = ReMatRegs.find_first();
  while (VReg != -1) {
    if (MRI->use_empty(VReg)) {
      MachineInstr *DefMI = MRI->getVRegDef(VReg);
      DefMI->eraseFromParent();
    }
    VReg = ReMatRegs.find_next(VReg);
  }

  return MadeChange;
}