X86InstrInfo.td

          (OR16rr GR16:$src1, GR16:$src2)>;
def : Pat<(parallel (X86or_flag GR32:$src1, GR32:$src2),
                    (implicit EFLAGS)),
          (OR32rr GR32:$src1, GR32:$src2)>;

// Register-Memory Or with EFLAGS result
def : Pat<(parallel (X86or_flag GR8:$src1, (loadi8 addr:$src2)),
                    (implicit EFLAGS)),
          (OR8rm GR8:$src1, addr:$src2)>;
def : Pat<(parallel (X86or_flag GR16:$src1, (loadi16 addr:$src2)),
                    (implicit EFLAGS)),
          (OR16rm GR16:$src1, addr:$src2)>;
def : Pat<(parallel (X86or_flag GR32:$src1, (loadi32 addr:$src2)),
                    (implicit EFLAGS)),
          (OR32rm GR32:$src1, addr:$src2)>;

// Register-Integer Or with EFLAGS result
def : Pat<(parallel (X86or_flag GR8:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (OR8ri GR8:$src1, imm:$src2)>;
def : Pat<(parallel (X86or_flag GR16:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (OR16ri GR16:$src1, imm:$src2)>;
def : Pat<(parallel (X86or_flag GR32:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (OR32ri GR32:$src1, imm:$src2)>;
def : Pat<(parallel (X86or_flag GR16:$src1, i16immSExt8:$src2),
                    (implicit EFLAGS)),
          (OR16ri8 GR16:$src1, i16immSExt8:$src2)>;
def : Pat<(parallel (X86or_flag GR32:$src1, i32immSExt8:$src2),
                    (implicit EFLAGS)),
          (OR32ri8 GR32:$src1, i32immSExt8:$src2)>;
/*
// Memory-Register Or with EFLAGS result
def : Pat<(parallel (store (X86or_flag (loadi8 addr:$dst), GR8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR8mr addr:$dst, GR8:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi16 addr:$dst), GR16:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR16mr addr:$dst, GR16:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi32 addr:$dst), GR32:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR32mr addr:$dst, GR32:$src2)>;

// Memory-Integer Or with EFLAGS result
def : Pat<(parallel (store (X86or_flag (loadi8 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR8mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi16 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR16mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi32 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR32mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi16 addr:$dst), i16immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR16mi8 addr:$dst, i16immSExt8:$src2)>;
def : Pat<(parallel (store (X86or_flag (loadi32 addr:$dst), i32immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (OR32mi8 addr:$dst, i32immSExt8:$src2)>;
          */

// Register-Register XOr with EFLAGS result
def : Pat<(parallel (X86xor_flag GR8:$src1, GR8:$src2),
                    (implicit EFLAGS)),
          (XOR8rr GR8:$src1, GR8:$src2)>;
def : Pat<(parallel (X86xor_flag GR16:$src1, GR16:$src2),
                    (implicit EFLAGS)),
          (XOR16rr GR16:$src1, GR16:$src2)>;
def : Pat<(parallel (X86xor_flag GR32:$src1, GR32:$src2),
                    (implicit EFLAGS)),
          (XOR32rr GR32:$src1, GR32:$src2)>;

// Register-Memory XOr with EFLAGS result
def : Pat<(parallel (X86xor_flag GR8:$src1, (loadi8 addr:$src2)),
                    (implicit EFLAGS)),
          (XOR8rm GR8:$src1, addr:$src2)>;
def : Pat<(parallel (X86xor_flag GR16:$src1, (loadi16 addr:$src2)),
                    (implicit EFLAGS)),
          (XOR16rm GR16:$src1, addr:$src2)>;
def : Pat<(parallel (X86xor_flag GR32:$src1, (loadi32 addr:$src2)),
                    (implicit EFLAGS)),
          (XOR32rm GR32:$src1, addr:$src2)>;

// Register-Integer XOr with EFLAGS result
def : Pat<(parallel (X86xor_flag GR8:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (XOR8ri GR8:$src1, imm:$src2)>;
def : Pat<(parallel (X86xor_flag GR16:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (XOR16ri GR16:$src1, imm:$src2)>;
def : Pat<(parallel (X86xor_flag GR32:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (XOR32ri GR32:$src1, imm:$src2)>;
def : Pat<(parallel (X86xor_flag GR16:$src1, i16immSExt8:$src2),
                    (implicit EFLAGS)),
          (XOR16ri8 GR16:$src1, i16immSExt8:$src2)>;
def : Pat<(parallel (X86xor_flag GR32:$src1, i32immSExt8:$src2),
                    (implicit EFLAGS)),
          (XOR32ri8 GR32:$src1, i32immSExt8:$src2)>;

/*
// Memory-Register XOr with EFLAGS result
def : Pat<(parallel (store (X86xor_flag (loadi8 addr:$dst), GR8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR8mr addr:$dst, GR8:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi16 addr:$dst), GR16:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR16mr addr:$dst, GR16:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi32 addr:$dst), GR32:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR32mr addr:$dst, GR32:$src2)>;

// Memory-Integer XOr with EFLAGS result
def : Pat<(parallel (store (X86xor_flag (loadi8 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR8mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi16 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR16mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi32 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR32mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi16 addr:$dst), i16immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR16mi8 addr:$dst, i16immSExt8:$src2)>;
def : Pat<(parallel (store (X86xor_flag (loadi32 addr:$dst), i32immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (XOR32mi8 addr:$dst, i32immSExt8:$src2)>;
*/

// Register-Register And with EFLAGS result
def : Pat<(parallel (X86and_flag GR8:$src1, GR8:$src2),
                    (implicit EFLAGS)),
          (AND8rr GR8:$src1, GR8:$src2)>;
def : Pat<(parallel (X86and_flag GR16:$src1, GR16:$src2),
                    (implicit EFLAGS)),
          (AND16rr GR16:$src1, GR16:$src2)>;
def : Pat<(parallel (X86and_flag GR32:$src1, GR32:$src2),
                    (implicit EFLAGS)),
          (AND32rr GR32:$src1, GR32:$src2)>;

// Register-Memory And with EFLAGS result
def : Pat<(parallel (X86and_flag GR8:$src1, (loadi8 addr:$src2)),
                    (implicit EFLAGS)),
          (AND8rm GR8:$src1, addr:$src2)>;
def : Pat<(parallel (X86and_flag GR16:$src1, (loadi16 addr:$src2)),
                    (implicit EFLAGS)),
          (AND16rm GR16:$src1, addr:$src2)>;
def : Pat<(parallel (X86and_flag GR32:$src1, (loadi32 addr:$src2)),
                    (implicit EFLAGS)),
          (AND32rm GR32:$src1, addr:$src2)>;

// Register-Integer And with EFLAGS result
def : Pat<(parallel (X86and_flag GR8:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (AND8ri GR8:$src1, imm:$src2)>;
def : Pat<(parallel (X86and_flag GR16:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (AND16ri GR16:$src1, imm:$src2)>;
def : Pat<(parallel (X86and_flag GR32:$src1, imm:$src2),
                    (implicit EFLAGS)),
          (AND32ri GR32:$src1, imm:$src2)>;
def : Pat<(parallel (X86and_flag GR16:$src1, i16immSExt8:$src2),
                    (implicit EFLAGS)),
          (AND16ri8 GR16:$src1, i16immSExt8:$src2)>;
def : Pat<(parallel (X86and_flag GR32:$src1, i32immSExt8:$src2),
                    (implicit EFLAGS)),
          (AND32ri8 GR32:$src1, i32immSExt8:$src2)>;

/*
// Memory-Register And with EFLAGS result
def : Pat<(parallel (store (X86and_flag (loadi8 addr:$dst), GR8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND8mr addr:$dst, GR8:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi16 addr:$dst), GR16:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND16mr addr:$dst, GR16:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi32 addr:$dst), GR32:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND32mr addr:$dst, GR32:$src2)>;

// Memory-Integer And with EFLAGS result
def : Pat<(parallel (store (X86and_flag (loadi8 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND8mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi16 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND16mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi32 addr:$dst), imm:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND32mi addr:$dst, imm:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi16 addr:$dst), i16immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND16mi8 addr:$dst, i16immSExt8:$src2)>;
def : Pat<(parallel (store (X86and_flag (loadi32 addr:$dst), i32immSExt8:$src2),
                           addr:$dst),
                    (implicit EFLAGS)),
          (AND32mi8 addr:$dst, i32immSExt8:$src2)>;
*/

// -disable-16bit support.
def : Pat<(truncstorei16 (i16 imm:$src), addr:$dst),
          (MOV16mi addr:$dst, imm:$src)>;
def : Pat<(truncstorei16 GR32:$src, addr:$dst),
          (MOV16mr addr:$dst, (EXTRACT_SUBREG GR32:$src, x86_subreg_16bit))>;
def : Pat<(i32 (sextloadi16 addr:$dst)),
          (MOVSX32rm16 addr:$dst)>;
def : Pat<(i32 (zextloadi16 addr:$dst)),
          (MOVZX32rm16 addr:$dst)>;
def : Pat<(i32 (extloadi16 addr:$dst)),
          (MOVZX32rm16 addr:$dst)>;

//===----------------------------------------------------------------------===//
// Floating Point Stack Support
//===----------------------------------------------------------------------===//

include "X86InstrFPStack.td"

//===----------------------------------------------------------------------===//
// X86-64 Support
//===----------------------------------------------------------------------===//

include "X86Instr64bit.td"

//===----------------------------------------------------------------------===//
// SIMD support (SSE, MMX and AVX)
//===----------------------------------------------------------------------===//

include "X86InstrFragmentsSIMD.td"

//===----------------------------------------------------------------------===//
// XMM Floating point support (requires SSE / SSE2)
//===----------------------------------------------------------------------===//

include "X86InstrSSE.td"

//===----------------------------------------------------------------------===//
// MMX and XMM Packed Integer support (requires MMX, SSE, and SSE2)
//===----------------------------------------------------------------------===//

include "X86InstrMMX.td"