X86InstrInfo.td

               II<(ops), "fldz">;
def FLD1 : FPI<0xE8, RawFrm, ZeroArgFP>, D9,
               II<(ops), "fld1">;


// Unary operations...
def FCHS : FPI<0xE0, RawFrm, OneArgFPRW>,           // f1 = fchs f2
               II<(ops), "fchs">, D9;
def FTST : FPI<0xE4, RawFrm, OneArgFP>,             // ftst ST(0)
               II<(ops), "ftst">, D9;

// Binary arithmetic operations...
class FPST0rInst<bits<8> o, dag ops, string asm> : I<o, AddRegFrm, ops, asm>, D8 {
  list<Register> Uses = [ST0];
  list<Register> Defs = [ST0];
}
class FPrST0Inst<bits<8> o, dag ops, string asm> : I<o, AddRegFrm, ops, asm>, DC {
  list<Register> Uses = [ST0];
}
class FPrST0PInst<bits<8> o, dag ops, string asm> : I<o, AddRegFrm, ops, asm>, DE {
  list<Register> Uses = [ST0];
}

def FADDST0r   : FPST0rInst <0xC0, (ops RST:$op), "fadd $op">;
def FADDrST0   : FPrST0Inst <0xC0, (ops RST:$op), "fadd $op, %ST(0)">;
def FADDPrST0  : FPrST0PInst<0xC0, (ops RST:$op), "faddp $op">;

def FSUBRST0r  : FPST0rInst <0xE8, (ops RST:$op), "fsubr $op">;
def FSUBrST0   : FPrST0Inst <0xE8, (ops RST:$op), "fsub $op, %ST(0)">;
def FSUBPrST0  : FPrST0PInst<0xE8, (ops RST:$op), "fsubp $op">;

def FSUBST0r   : FPST0rInst <0xE0, (ops RST:$op), "fsub $op">;
def FSUBRrST0  : FPrST0Inst <0xE0, (ops RST:$op), "fsubr $op, %ST(0)">;
def FSUBRPrST0 : FPrST0PInst<0xE0, (ops RST:$op), "fsubrp $op">;

def FMULST0r   : FPST0rInst <0xC8, (ops RST:$op), "fmul $op">;
def FMULrST0   : FPrST0Inst <0xC8, (ops RST:$op), "fmul $op, %ST(0)">;
def FMULPrST0  : FPrST0PInst<0xC8, (ops RST:$op), "fmulp $op">;

def FDIVRST0r  : FPST0rInst <0xF8, (ops RST:$op), "fdivr $op">;
def FDIVrST0   : FPrST0Inst <0xF8, (ops RST:$op), "fdiv $op, %ST(0)">;
def FDIVPrST0  : FPrST0PInst<0xF8, (ops RST:$op), "fdivp $op">;

def FDIVST0r   : FPST0rInst <0xF0, (ops RST:$op), "fdiv $op">;           // ST(0) = ST(0) / ST(i)
def FDIVRrST0  : FPrST0Inst <0xF0, (ops RST:$op), "fdivr $op, %ST(0)">;  // ST(i) = ST(0) / ST(i)
def FDIVRPrST0 : FPrST0PInst<0xF0, (ops RST:$op), "fdivrp $op">;         // ST(i) = ST(0) / ST(i), pop

// Floating point compares
def FUCOMr    : FPI<0xE0, AddRegFrm, CompareFP>,                         // FPSW = compare ST(0) with ST(i)
                II<(ops RST:$reg), "fucom $reg">, DD, Imp<[ST0],[]>;
def FUCOMPr   : I<0xE8, AddRegFrm, (ops RST:$reg),
                  "fucomp $reg">, DD, Imp<[ST0],[]>;  // FPSW = compare ST(0) with ST(i), pop
def FUCOMPPr  : I<0xE9, RawFrm, (ops),
                  "fucompp">, DA, Imp<[ST0],[]>;  // compare ST(0) with ST(1), pop, pop

def FUCOMIr  : FPI<0xE8, AddRegFrm, CompareFP>, // CC = compare ST(0) with ST(i)
               II<(ops RST:$reg), "fucomi %ST(0), $reg">, DB, Imp<[ST0],[]>;
def FUCOMIPr : I<0xE8, AddRegFrm, (ops RST:$reg),
                 "fucomip %ST(0), $reg">, DF, Imp<[ST0],[]>;  // CC = compare ST(0) with ST(i), pop


// Floating point flag ops
def FNSTSW8r  : I<0xE0, RawFrm, (ops), "fnstsw">, DF, Imp<[],[AX]>;   // AX = fp flags

def FNSTCW16m : I<0xD9, MRM7m, (ops i16mem:$dst), "fnstcw $dst">; // [mem16] = X87 control world
def FLDCW16m  : I<0xD9, MRM5m, (ops i16mem:$dst), "fldcw $dst">;  // X87 control world = [mem16]