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  • Evan Cheng's avatar
    Properly model the latency of register defs which are 1) function returns or · 15459b69
    Evan Cheng authored
    2) live-outs.
    
    Previously the post-RA schedulers completely ignore these dependencies since
    returns, branches, etc. are all scheduling barriers. This patch model the
    latencies between instructions being scheduled and the barriers. It also
    handle calls by marking their register uses.
    
    llvm-svn: 117193
    15459b69
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