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    Various bits of framework needed for precise machine-level selection · 10ffc2b6
    Andrew Trick authored
    DAG scheduling during isel. Most new functionality is currently
    guarded by -enable-sched-cycles and -enable-sched-hazard.
    
    Added InstrItineraryData::IssueWidth field, currently derived from
    ARM itineraries, but could be initialized differently on other targets.
    
    Added ScheduleHazardRecognizer::MaxLookAhead to indicate whether it is
    active, and if so how many cycles of state it holds.
    
    Added SchedulingPriorityQueue::HasReadyFilter to allowing gating entry
    into the scheduler's available queue.
    
    ScoreboardHazardRecognizer now accesses the ScheduleDAG in order to
    get information about it's SUnits, provides RecedeCycle for bottom-up
    scheduling, correctly computes scoreboard depth, tracks IssueCount, and
    considers potential stall cycles when checking for hazards.
    
    ScheduleDAGRRList now models machine cycles and hazards (under
    flags). It tracks MinAvailableCycle, drives the hazard recognizer and
    priority queue's ready filter, manages a new PendingQueue, properly
    accounts for stall cycles, etc.
    
    llvm-svn: 122541
    10ffc2b6
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