llvm/lib/Target/ARM/ARMInstrInfo.td · 26076a8f102c5e2a8dbb91f9d1f64a7fbb7be5c8 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI" · b5044ce5
Bob Wilson authored Oct 27, 2009
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instruction format that already takes care of setting this.

llvm-svn: 85280
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b5044ce5