Skip to content
  • Evan Cheng's avatar
    Disable folding loads into tail call in 32-bit PIC mode. It can introduce illegal code like this: · b07a29ec
    Evan Cheng authored
            addl    $12, %esp
            popl    %esi
            popl    %edi
            popl    %ebx
            popl    %ebp
            jmpl    *__Block_deallocator-L1$pb(%esi)  # TAILCALL
    
    The problem is the global base register is assigned GR32 register class. TCRETURNmi needs the registers making up the address mode to have the GR32_TC register class.
    
    The *proper* fix is for X86DAGToDAGISel::getGlobalBaseReg() to return a copy from the global base register of the machine function rather than returning the register itself. But that has the potential of causing it to be coalesced to a more restrictive register class: GR32_TC. It can introduce additional copies and spills. For something as important the PIC base, it's not worth it especially since this is not an issue on 64-bit.
    
    llvm-svn: 99455
    b07a29ec
Loading