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    Fix a long standing deficiency in the X86 backend: we would · 5728bdd4
    Chris Lattner authored
    sometimes emit "zero" and "all one" vectors multiple times,
    for example:
    
    _test2:
    	pcmpeqd	%mm0, %mm0
    	movq	%mm0, _M1
    	pcmpeqd	%mm0, %mm0
    	movq	%mm0, _M2
    	ret
    
    instead of:
    
    _test2:
    	pcmpeqd	%mm0, %mm0
    	movq	%mm0, _M1
    	movq	%mm0, _M2
    	ret
    
    This patch fixes this by always arranging for zero/one vectors
    to be defined as v4i32 or v2i32 (SSE/MMX) instead of letting them be
    any random type.  This ensures they get trivially CSE'd on the dag.
    This fix is also important for LegalizeDAGTypes, as it gets unhappy
    when the x86 backend wants BUILD_VECTOR(i64 0) to be legal even when
    'i64' isn't legal.
    
    This patch makes the following changes:
    
    1) X86TargetLowering::LowerBUILD_VECTOR now lowers 0/1 vectors into
       their canonical types.
    2) The now-dead patterns are removed from the SSE/MMX .td files.
    3) All the patterns in the .td file that referred to immAllOnesV or
       immAllZerosV in the wrong form now use *_bc to match them with a
       bitcast wrapped around them.
    4) X86DAGToDAGISel::SelectScalarSSELoad is generalized to handle 
       bitcast'd zero vectors, which simplifies the code actually.
    5) getShuffleVectorZeroOrUndef is updated to generate a shuffle that
       is legal, instead of generating one that is illegal and expecting
       a later legalize pass to clean it up.
    6) isZeroShuffle is generalized to handle bitcast of zeros.
    7) several other minor tweaks.
    
    This patch is definite goodness, but has the potential to cause random
    code quality regressions.  Please be on the lookout for these and let 
    me know if they happen.
    
    llvm-svn: 44310
    5728bdd4
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