llvm/utils/TableGen/CodeGenInstruction.cpp · 6e0e8d7d647bfc3ff39848809357d7e49a75fa31 · Roger Ferrer / llvm-epi-0.8 · GitLab

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Add an TargetInstrDesc bit to indicate that a given instruction is a conditional move. · 6e0e8d7d
Owen Anderson authored Sep 23, 2010
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Not intended functionality change, as nothing uses this yet.

llvm-svn: 114702
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6e0e8d7d