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llvm-epi-0.8
llvm
lib
Target
ARM
ARMInstrInfo.td
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Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee
· 804f6159
Bob Wilson
authored
Aug 16, 2010
that the high halfword is zero. The shift need not be exactly 16 bits. llvm-svn: 111196
804f6159
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