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    [mips][sched] Split IIArith in preparation for the first scheduler targeting a specific MIPS CPU. · 980589a8
    Daniel Sanders authored
    IIArith -> II_ADD, II_ADDU, II_AND, II_CL[ZO], II_DADDIU, II_DADDU,
      II_DROTR, II_DROTR32, II_DROTRV, II_DSLL, II_DSLL32, II_DSLLV,
      II_DSR[AL], II_DSR[AL]32, II_DSR[AL]V, II_DSUBU, II_LUI, II_MOV[ZFNT],
      II_NOR, II_OR, II_RDHWR, II_ROTR, II_ROTRV, II_SLL, II_SLLV, II_SR[AL],
      II_SR[AL]V, II_SUBU, II_XOR
    
    No functional change since the InstrItinData's have been duplicated.
    
    This is necessary because the classes are shared between all schedulers.
    
    Once this patch series is committed there will be an InstrItinClass for
    each mnemonic with minimal grouping. This does increase the size of the
    itinerary tables for each MIPS scheduler but we have a few options for dealing
    with that later. These options include reducing the number of classes once
    we see the best way to simplify them, or by extending tablegen to be able
    to compress the table by eliminating duplicates entries, etc.
    
    llvm-svn: 199391
    980589a8
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