llvm/lib/Target/Mips/MipsInstrFPU.td · 9b9586a5aeb95fd2b7190ae29d4046dc4fad7a7e · Roger Ferrer / llvm-epi-0.8 · GitLab

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Removed AFGR32 register class · 9b9586a5
Bruno Cardoso Lopes authored Mar 21, 2009
```
Handle odd registers allocation in FGR32.

llvm-svn: 67422
```
9b9586a5