llvm/lib/Target/ARM/ARMInstrInfo.td · a6aba77e0aee2e6d47b6973fef8391b245dd3411 · Roger Ferrer / llvm-epi-0.8 · GitLab

This is an archived project. Repository and other project resources are read-only.

Add more ARM instruction encodings for 's' bit set and "rs" register encoding · a6aba77e
Bob Wilson authored Oct 26, 2009
```
bits.  Patch by Johnny Chen.

llvm-svn: 85167
```
a6aba77e