llvm/lib/Target/ARM/ARMInstrInfo.td · b5044ce5a9a3baeead95b6da07d9b2b48c3337ed · Roger Ferrer / llvm-epi-0.8 · GitLab

This is an archived project. Repository and other project resources are read-only.

"git@repo.hca.bsc.es:rferrer/llvm-epi-0.8.git" did not exist on "0192c234d5167c2f49f030d6ef80f0320c795696"

Do not clear the "S" bit for RSCri and RSCrs. They inherit from the "sI" · b5044ce5
Bob Wilson authored Oct 27, 2009
```
instruction format that already takes care of setting this.

llvm-svn: 85280
```
b5044ce5