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  • David Greene's avatar
    · ef1f36d3
    David Greene authored
    Prefix IR dumps with LiveInterval indices when possible.  This turns
    this:
    
    	%ESI<def> = MOV32rr %EDI<kill>
    	ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
    	%reg1027<def> = MOVZX64rr32 %ESI
    	%reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead>
    	%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
    	%RDI<def> = MOV64rr %RSP
    	%RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead>
    	%RSP<def> = MOV64rr %RDI
    
    into this:
    
    4	%reg1024<def> = MOV32rr %EDI<kill>
    12	ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
    20	%reg1025<def> = MOVZX64rr32 %reg1024
    28	%reg1026<def> = MOV64rr %reg1025<kill>
    36	%reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead>
    44	%reg1027<def> = MOV64rr %reg1026<kill>
    52	%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
    60	%reg1028<def> = MOV64rr %RSP
    68	%reg1029<def> = MOV64rr %reg1028<kill>
    76	%reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead>
    84	%RSP<def> = MOV64rr %reg1029
    
    This helps greatly when debugging register allocation and coalescing
    problems.
    
    llvm-svn: 76615
    ef1f36d3
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