llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp · d3090bcfc8ccafac28cdd07072f6725ec7ee7f0b · Roger Ferrer / llvm-epi-0.8 · GitLab

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If a register operand comes from the variadic part of a node, don't · d3090bcf
Chris Lattner authored Mar 11, 2008
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verify the register constraint matches what the instruction expects.

llvm-svn: 48205
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