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Commit 033f99a2 authored by Tim Renouf's avatar Tim Renouf
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[AMDGPU] Added v5i32 and v5f32 register classes

They are not used by anything yet, but a subsequent commit will start
using them for image ops that return 5 dwords.

Differential Revision: https://reviews.llvm.org/D58903

Change-Id: I63e1904081e39a6d66e4eb96d51df25ad399d271
llvm-svn: 356735
parent f8c785bf
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