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Commit 05f13e94 authored by Evan Cheng's avatar Evan Cheng
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Correct some load / store instruction itinerary mistakes: 

1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134
parent b7c04624
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