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This is an archived project. Repository and other project resources are read-only.
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Roger Ferrer
llvm-epi-0.8
Commits
142f104b
Commit
142f104b
authored
15 years ago
by
Daniel Dunbar
Browse files
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llvm-mc/x86: Rename X86Operand::ScaleReg to IndexReg and make order consistent
with syntax. llvm-svn: 74679
parent
0ff99383
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1
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1 changed file
llvm/tools/llvm-mc/MC-X86Specific.cpp
+6
-6
6 additions, 6 deletions
llvm/tools/llvm-mc/MC-X86Specific.cpp
with
6 additions
and
6 deletions
llvm/tools/llvm-mc/MC-X86Specific.cpp
+
6
−
6
View file @
142f104b
...
@@ -37,8 +37,8 @@ struct AsmParser::X86Operand {
...
@@ -37,8 +37,8 @@ struct AsmParser::X86Operand {
unsigned
SegReg
;
unsigned
SegReg
;
MCValue
Disp
;
MCValue
Disp
;
unsigned
BaseReg
;
unsigned
BaseReg
;
unsigned
IndexReg
;
unsigned
Scale
;
unsigned
Scale
;
unsigned
ScaleReg
;
}
Mem
;
}
Mem
;
};
};
...
@@ -55,14 +55,14 @@ struct AsmParser::X86Operand {
...
@@ -55,14 +55,14 @@ struct AsmParser::X86Operand {
return
Res
;
return
Res
;
}
}
static
X86Operand
CreateMem
(
unsigned
SegReg
,
MCValue
Disp
,
unsigned
BaseReg
,
static
X86Operand
CreateMem
(
unsigned
SegReg
,
MCValue
Disp
,
unsigned
BaseReg
,
unsigned
Scale
,
unsigned
Scale
Reg
)
{
unsigned
IndexReg
,
unsigned
Scale
)
{
X86Operand
Res
;
X86Operand
Res
;
Res
.
Kind
=
Memory
;
Res
.
Kind
=
Memory
;
Res
.
Mem
.
SegReg
=
SegReg
;
Res
.
Mem
.
SegReg
=
SegReg
;
Res
.
Mem
.
Disp
=
Disp
;
Res
.
Mem
.
Disp
=
Disp
;
Res
.
Mem
.
BaseReg
=
BaseReg
;
Res
.
Mem
.
BaseReg
=
BaseReg
;
Res
.
Mem
.
IndexReg
=
IndexReg
;
Res
.
Mem
.
Scale
=
Scale
;
Res
.
Mem
.
Scale
=
Scale
;
Res
.
Mem
.
ScaleReg
=
ScaleReg
;
return
Res
;
return
Res
;
}
}
};
};
...
@@ -152,7 +152,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
...
@@ -152,7 +152,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
// If we reached here, then we just ate the ( of the memory operand. Process
// If we reached here, then we just ate the ( of the memory operand. Process
// the rest of the memory operand.
// the rest of the memory operand.
unsigned
BaseReg
=
0
,
Scale
Reg
=
0
,
Scale
=
0
;
unsigned
BaseReg
=
0
,
Index
Reg
=
0
,
Scale
=
0
;
if
(
Lexer
.
is
(
asmtok
::
Register
))
{
if
(
Lexer
.
is
(
asmtok
::
Register
))
{
BaseReg
=
123
;
// FIXME: decode reg #
BaseReg
=
123
;
// FIXME: decode reg #
...
@@ -163,7 +163,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
...
@@ -163,7 +163,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
Lexer
.
Lex
();
// eat the comma.
Lexer
.
Lex
();
// eat the comma.
if
(
Lexer
.
is
(
asmtok
::
Register
))
{
if
(
Lexer
.
is
(
asmtok
::
Register
))
{
Scale
Reg
=
123
;
// FIXME: decode reg #
Index
Reg
=
123
;
// FIXME: decode reg #
Lexer
.
Lex
();
// eat the register.
Lexer
.
Lex
();
// eat the register.
Scale
=
1
;
// If not specified, the scale defaults to 1.
Scale
=
1
;
// If not specified, the scale defaults to 1.
}
}
...
@@ -187,7 +187,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
...
@@ -187,7 +187,7 @@ bool AsmParser::ParseX86MemOperand(X86Operand &Op) {
return
TokError
(
"unexpected token in memory operand"
);
return
TokError
(
"unexpected token in memory operand"
);
Lexer
.
Lex
();
// Eat the ')'.
Lexer
.
Lex
();
// Eat the ')'.
Op
=
X86Operand
::
CreateMem
(
SegReg
,
Disp
,
BaseReg
,
Scale
,
Scale
Reg
);
Op
=
X86Operand
::
CreateMem
(
SegReg
,
Disp
,
BaseReg
,
IndexReg
,
Scale
);
return
false
;
return
false
;
}
}
...
...
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