Support pattern matching vsldoi(x,y) and vsldoi(x,x), which allows the f.e. to
lower it and LLVM to have one fewer intrinsic. This implements CodeGen/PowerPC/vec_shuffle.ll llvm-svn: 27450
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- llvm/lib/Target/PowerPC/PPCISelLowering.cpp 62 additions, 33 deletionsllvm/lib/Target/PowerPC/PPCISelLowering.cpp
- llvm/lib/Target/PowerPC/PPCISelLowering.h 8 additions, 0 deletionsllvm/lib/Target/PowerPC/PPCISelLowering.h
- llvm/lib/Target/PowerPC/PPCInstrAltivec.td 27 additions, 3 deletionsllvm/lib/Target/PowerPC/PPCInstrAltivec.td
- llvm/lib/Target/PowerPC/README_ALTIVEC.txt 0 additions, 5 deletionsllvm/lib/Target/PowerPC/README_ALTIVEC.txt
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