Skip to content
Commit 25415c2b authored by Hal Finkel's avatar Hal Finkel
Browse files

Correct the pre-increment load latencies in the PPC A2 itinerary

Pre-increment loads are microcoded on the A2, and the address increment occurs
only after the load completes. As a result, the latency of the GPR address
update is an additional 2 cycles on top of the load latency.

llvm-svn: 191156
parent aa78931e
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment