Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...
Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3 instead of Operand 2 so needs special casing in the disassembler and code emitter. Ultimately, should pass this information from tablegen llvm-svn: 142105
Loading
Please register or sign in to comment