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Commit 2773f1de authored by Arnold Schwaighofer's avatar Arnold Schwaighofer
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ARM sched model: Add divsion, loads, branches, vfp cvt 

Add some generic SchedWrites and assign resources for Swift and Cortex A9.

Reapply of r183257. (Removed empty InstRW for division on swift)

llvm-svn: 183319
parent ae748148
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